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Viet Q. Nguyen

Examiner (ID: 10659, Phone: (571)272-1788 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2307, 2503, 2511, 2818, 2827, 2824
Total Applications
3976
Issued Applications
3621
Pending Applications
133
Abandoned Applications
252

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20047297 [patent_doc_number] => 20250185519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => MAGNETIC MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 19/042045 [patent_app_country] => US [patent_app_date] => 2025-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19042045 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/042045
MAGNETIC MEMORY DEVICE AND METHOD OF OPERATING THE SAME Jan 30, 2025 Pending
Array ( [id] => 20028450 [patent_doc_number] => 20250166672 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => MEMORY CIRCUIT AND METHOD OF OPERATING SAME [patent_app_type] => utility [patent_app_number] => 19/033172 [patent_app_country] => US [patent_app_date] => 2025-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12421 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19033172 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/033172
MEMORY CIRCUIT AND METHOD OF OPERATING SAME Jan 20, 2025 Pending
Array ( [id] => 20071872 [patent_doc_number] => 20250210094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => MEMORY DEVICE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 19/023577 [patent_app_country] => US [patent_app_date] => 2025-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 35396 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19023577 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/023577
MEMORY DEVICE AND ELECTRONIC DEVICE Jan 15, 2025 Pending
Array ( [id] => 20019291 [patent_doc_number] => 20250157513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => SEMICONDUCTOR MEMORY DEVICES HAVING EFFICIENT SERIALIZERS THEREIN FOR TRANSFERRING DATA [patent_app_type] => utility [patent_app_number] => 19/021918 [patent_app_country] => US [patent_app_date] => 2025-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4518 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19021918 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/021918
SEMICONDUCTOR MEMORY DEVICES HAVING EFFICIENT SERIALIZERS THEREIN FOR TRANSFERRING DATA Jan 14, 2025 Pending
Array ( [id] => 19893072 [patent_doc_number] => 20250118384 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => Multi-Fuse Memory Cell Circuit and Method [patent_app_type] => utility [patent_app_number] => 18/984182 [patent_app_country] => US [patent_app_date] => 2024-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18984182 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/984182
Multi-Fuse Memory Cell Circuit and Method Dec 16, 2024 Pending
Array ( [id] => 20399357 [patent_doc_number] => 20250374832 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => SEMICONDUCTOR DEVICE CAPABLE OF SIMULTANEOUSLY CHANGING POLARITY AND MAGNITUDE OF ANOMALOUS HALL EFFECT SIGNAL ACCORDING TO INPUT CURRENT, OPERATING METHOD THEREOF, AND SYSTEM [patent_app_type] => utility [patent_app_number] => 18/984708 [patent_app_country] => US [patent_app_date] => 2024-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18984708 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/984708
SEMICONDUCTOR DEVICE CAPABLE OF SIMULTANEOUSLY CHANGING POLARITY AND MAGNITUDE OF ANOMALOUS HALL EFFECT SIGNAL ACCORDING TO INPUT CURRENT, OPERATING METHOD THEREOF, AND SYSTEM Dec 16, 2024 Pending
Array ( [id] => 20096099 [patent_doc_number] => 20250226035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => ERASE DISTRIBUTION TIGHTENING TO IMPROVE READ BUDGET WINDOW IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 18/977030 [patent_app_country] => US [patent_app_date] => 2024-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5498 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18977030 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/977030
ERASE DISTRIBUTION TIGHTENING TO IMPROVE READ BUDGET WINDOW IN A MEMORY SUB-SYSTEM Dec 10, 2024 Pending
Array ( [id] => 20167639 [patent_doc_number] => 20250259686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-14 [patent_title] => PAGE BUFFER CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/973603 [patent_app_country] => US [patent_app_date] => 2024-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14254 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18973603 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/973603
PAGE BUFFER CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME Dec 8, 2024 Pending
Array ( [id] => 20090987 [patent_doc_number] => 20250220923 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => MEMORY CIRCUIT, RESISTIVE NON-VOLATILE MEMORY AND OPERATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/974692 [patent_app_country] => US [patent_app_date] => 2024-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8014 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18974692 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/974692
MEMORY CIRCUIT, RESISTIVE NON-VOLATILE MEMORY AND OPERATION METHOD THEREOF Dec 8, 2024 Pending
Array ( [id] => 19865975 [patent_doc_number] => 20250104761 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE [patent_app_type] => utility [patent_app_number] => 18/971871 [patent_app_country] => US [patent_app_date] => 2024-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8882 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18971871 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/971871
SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE Dec 5, 2024 Pending
Array ( [id] => 20063072 [patent_doc_number] => 20250201294 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => RANDOMIZED REFRESH OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/970701 [patent_app_country] => US [patent_app_date] => 2024-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6108 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18970701 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/970701
RANDOMIZED REFRESH OPERATIONS Dec 4, 2024 Pending
Array ( [id] => 19850376 [patent_doc_number] => 20250095727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => FERROELECTRIC MEMORY AND DATA READING METHOD AND DATA WRITING METHOD THEREFOR, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 18/966286 [patent_app_country] => US [patent_app_date] => 2024-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10904 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18966286 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/966286
FERROELECTRIC MEMORY AND DATA READING METHOD AND DATA WRITING METHOD THEREFOR, AND ELECTRONIC APPARATUS Dec 2, 2024 Pending
Array ( [id] => 20588370 [patent_doc_number] => 20260073966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-12 [patent_title] => INTEGRATED CIRCUITS FOR LARGE-SCALE TRANSISTOR TENSOR OPERATIONS [patent_app_type] => utility [patent_app_number] => 18/964417 [patent_app_country] => US [patent_app_date] => 2024-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20168 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18964417 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/964417
INTEGRATED CIRCUITS FOR LARGE-SCALE TRANSISTOR TENSOR OPERATIONS Nov 29, 2024 Pending
Array ( [id] => 19850364 [patent_doc_number] => 20250095715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => NON-VOLATILE MEMORY DEVICE AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/964165 [patent_app_country] => US [patent_app_date] => 2024-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4107 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18964165 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/964165
NON-VOLATILE MEMORY DEVICE AND CONTROL METHOD Nov 28, 2024 Pending
Array ( [id] => 20476008 [patent_doc_number] => 20260018229 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-15 [patent_title] => CONTROLLER, MEMORY MODULE AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/955528 [patent_app_country] => US [patent_app_date] => 2024-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2393 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18955528 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/955528
CONTROLLER, MEMORY MODULE AND MEMORY SYSTEM Nov 20, 2024 Pending
Array ( [id] => 19818898 [patent_doc_number] => 20250077105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => MEMORY CONTROLLER AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/952823 [patent_app_country] => US [patent_app_date] => 2024-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 52560 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18952823 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/952823
MEMORY CONTROLLER AND OPERATING METHOD THEREOF Nov 18, 2024 Pending
Array ( [id] => 19803724 [patent_doc_number] => 20250069649 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => READ/WRITE CIRCUIT, READ/WRITE METHOD, AND MEMORY [patent_app_type] => utility [patent_app_number] => 18/948537 [patent_app_country] => US [patent_app_date] => 2024-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13989 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18948537 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/948537
READ/WRITE CIRCUIT, READ/WRITE METHOD, AND MEMORY Nov 14, 2024 Pending
Array ( [id] => 20088578 [patent_doc_number] => 20250218514 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => NEUROMORPHIC MEMORY DEVICE AND NEUROMORPHIC SYSTEM USING THE SAME [patent_app_type] => utility [patent_app_number] => 18/939966 [patent_app_country] => US [patent_app_date] => 2024-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18939966 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/939966
NEUROMORPHIC MEMORY DEVICE AND NEUROMORPHIC SYSTEM USING THE SAME Nov 6, 2024 Pending
Array ( [id] => 20617992 [patent_doc_number] => 20260088095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-26 [patent_title] => MEMORY ARRAY AND METHODS OF OPERATION [patent_app_type] => utility [patent_app_number] => 18/937319 [patent_app_country] => US [patent_app_date] => 2024-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18937319 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/937319
MEMORY ARRAY AND METHODS OF OPERATION Nov 4, 2024 Pending
Array ( [id] => 19788273 [patent_doc_number] => 20250061952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => COMPLEMENTARY METAL OXIDE SEMICONDUCTOR CIRCUIT OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/936422 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3212 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936422 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/936422
COMPLEMENTARY METAL OXIDE SEMICONDUCTOR CIRCUIT OF MEMORY DEVICE Nov 3, 2024 Pending
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