Search

Viet Q. Nguyen

Examiner (ID: 10659, Phone: (571)272-1788 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2307, 2503, 2511, 2818, 2827, 2824
Total Applications
3976
Issued Applications
3621
Pending Applications
133
Abandoned Applications
252

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19567532 [patent_doc_number] => 12142309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Low resistance MTJ antifuse circuitry designs and methods of operation [patent_app_type] => utility [patent_app_number] => 17/847265 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5664 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17847265 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/847265
Low resistance MTJ antifuse circuitry designs and methods of operation Jun 22, 2022 Issued
Array ( [id] => 18865604 [patent_doc_number] => 20230420041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => SENSE AMPLIFIER CIRCUIT, MEMORY CIRCUIT, AND SENSING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/846035 [patent_app_country] => US [patent_app_date] => 2022-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17846035 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/846035
Sense amplifier circuit, memory circuit, and sensing method thereof Jun 21, 2022 Issued
Array ( [id] => 19155090 [patent_doc_number] => 11980026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Magnetoresistive random access memory for physically unclonable function technology and associated random code generating method [patent_app_type] => utility [patent_app_number] => 17/839519 [patent_app_country] => US [patent_app_date] => 2022-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 8510 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 506 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17839519 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/839519
Magnetoresistive random access memory for physically unclonable function technology and associated random code generating method Jun 13, 2022 Issued
Array ( [id] => 18833852 [patent_doc_number] => 20230402379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => HYBRID SIGNAL AND POWER TRACK FOR STACKED TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/806602 [patent_app_country] => US [patent_app_date] => 2022-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8704 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806602 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/806602
Hybrid signal and power track for stacked transistors Jun 12, 2022 Issued
Array ( [id] => 19596781 [patent_doc_number] => 12154634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Data path circuit and method [patent_app_type] => utility [patent_app_number] => 17/833562 [patent_app_country] => US [patent_app_date] => 2022-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7435 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17833562 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/833562
Data path circuit and method Jun 5, 2022 Issued
Array ( [id] => 18192531 [patent_doc_number] => 20230046050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE [patent_app_type] => utility [patent_app_number] => 17/830981 [patent_app_country] => US [patent_app_date] => 2022-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8812 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17830981 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/830981
Signal routing between memory die and logic die Jun 1, 2022 Issued
Array ( [id] => 20914077 [patent_doc_number] => 12710922 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-18 [patent_title] => Arithmetic device [patent_app_type] => utility [patent_app_number] => 17/830302 [patent_app_country] => US [patent_app_date] => 2022-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 112 [patent_no_of_words] => 15788 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 317 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17830302 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/830302
ARITHMETIC DEVICE May 31, 2022 Pending
Array ( [id] => 19362801 [patent_doc_number] => 20240264835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => An Apparatus and Method of Generating Chip Select Signals [patent_app_type] => utility [patent_app_number] => 17/796724 [patent_app_country] => US [patent_app_date] => 2022-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8021 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17796724 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/796724
An Apparatus and Method of Generating Chip Select Signals May 31, 2022 Pending
Array ( [id] => 19046462 [patent_doc_number] => 11935581 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Circuit module with reliable margin configuration [patent_app_type] => utility [patent_app_number] => 17/828071 [patent_app_country] => US [patent_app_date] => 2022-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9197 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17828071 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/828071
Circuit module with reliable margin configuration May 30, 2022 Issued
Array ( [id] => 19765702 [patent_doc_number] => 12224000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-11 [patent_title] => Fast, energy efficient 6T SRAM arrays using harvested data [patent_app_type] => utility [patent_app_number] => 17/827763 [patent_app_country] => US [patent_app_date] => 2022-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 14 [patent_no_of_words] => 5574 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17827763 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/827763
Fast, energy efficient 6T SRAM arrays using harvested data May 28, 2022 Issued
Array ( [id] => 18562742 [patent_doc_number] => 11727992 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-15 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/824758 [patent_app_country] => US [patent_app_date] => 2022-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 22195 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824758 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/824758
Semiconductor memory device May 24, 2022 Issued
Array ( [id] => 18734604 [patent_doc_number] => 11803334 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-31 [patent_title] => Memory controller and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/824779 [patent_app_country] => US [patent_app_date] => 2022-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 49 [patent_no_of_words] => 46235 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824779 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/824779
Memory controller and operating method thereof May 24, 2022 Issued
Array ( [id] => 19370300 [patent_doc_number] => 12062390 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-13 [patent_title] => Apparatus and method for controlling supply of power for refresh operation [patent_app_type] => utility [patent_app_number] => 17/824303 [patent_app_country] => US [patent_app_date] => 2022-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 17895 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824303 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/824303
Apparatus and method for controlling supply of power for refresh operation May 24, 2022 Issued
Array ( [id] => 19276272 [patent_doc_number] => 12026400 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Memory controller and operating method thereof [patent_app_type] => utility [patent_app_number] => 17/824803 [patent_app_country] => US [patent_app_date] => 2022-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 49 [patent_no_of_words] => 46236 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17824803 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/824803
Memory controller and operating method thereof May 24, 2022 Issued
Array ( [id] => 18848497 [patent_doc_number] => 20230410901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => TEMPERATURE-DEPENDENT WORD LINE VOLTAGE AND DISCHARGE RATE FOR REFRESH READ OF NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 17/752524 [patent_app_country] => US [patent_app_date] => 2022-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16859 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17752524 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/752524
Temperature-dependent word line voltage and discharge rate for refresh read of non-volatile memory May 23, 2022 Issued
Array ( [id] => 18935255 [patent_doc_number] => 11887693 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-30 [patent_title] => Reconfigurable processing-in-memory logic [patent_app_type] => utility [patent_app_number] => 17/752430 [patent_app_country] => US [patent_app_date] => 2022-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7653 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17752430 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/752430
Reconfigurable processing-in-memory logic May 23, 2022 Issued
Array ( [id] => 17853683 [patent_doc_number] => 20220283725 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => MEMORY CONTROLLER AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/750121 [patent_app_country] => US [patent_app_date] => 2022-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 52526 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17750121 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/750121
Memory controller and operating method thereof May 19, 2022 Issued
Array ( [id] => 18789052 [patent_doc_number] => 20230377664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => MEMORY SUB-SYSTEM FOR MEMORY CELL TOUCH-UP [patent_app_type] => utility [patent_app_number] => 17/747761 [patent_app_country] => US [patent_app_date] => 2022-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9122 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17747761 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/747761
Memory sub-system for memory cell touch-up May 17, 2022 Issued
Array ( [id] => 19093690 [patent_doc_number] => 11955154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-09 [patent_title] => Sense amplifier circuit with temperature compensation [patent_app_type] => utility [patent_app_number] => 17/744746 [patent_app_country] => US [patent_app_date] => 2022-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2248 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17744746 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/744746
Sense amplifier circuit with temperature compensation May 15, 2022 Issued
Array ( [id] => 19237091 [patent_doc_number] => 20240194286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => Memory Structure and Memory Device [patent_app_type] => utility [patent_app_number] => 17/908477 [patent_app_country] => US [patent_app_date] => 2022-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8591 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17908477 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/908477
Memory structure and memory device May 11, 2022 Issued
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