Search

Viet Q. Nguyen

Examiner (ID: 18198, Phone: (571)272-1788 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2307, 2824, 2503, 2511, 2827, 2818
Total Applications
3921
Issued Applications
3581
Pending Applications
133
Abandoned Applications
252

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20063057 [patent_doc_number] => 20250201279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => SYSTEM AND METHOD FOR IMPROVING SAFETY OF INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 18/435286 [patent_app_country] => US [patent_app_date] => 2024-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9395 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18435286 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/435286
System and method for improving safety of integrated circuits Feb 6, 2024 Issued
Array ( [id] => 20139171 [patent_doc_number] => 20250246215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => INTEGRATION OF MEMORY CELLS AND LOGIC CELLS FOR COMPUTE-IN-MEMORY APPLICATIONS [patent_app_type] => utility [patent_app_number] => 18/427079 [patent_app_country] => US [patent_app_date] => 2024-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4964 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18427079 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/427079
INTEGRATION OF MEMORY CELLS AND LOGIC CELLS FOR COMPUTE-IN-MEMORY APPLICATIONS Jan 29, 2024 Pending
Array ( [id] => 20139171 [patent_doc_number] => 20250246215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => INTEGRATION OF MEMORY CELLS AND LOGIC CELLS FOR COMPUTE-IN-MEMORY APPLICATIONS [patent_app_type] => utility [patent_app_number] => 18/427079 [patent_app_country] => US [patent_app_date] => 2024-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4964 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18427079 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/427079
INTEGRATION OF MEMORY CELLS AND LOGIC CELLS FOR COMPUTE-IN-MEMORY APPLICATIONS Jan 29, 2024 Pending
Array ( [id] => 19321212 [patent_doc_number] => 20240242758 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => MEMORY ARRAY WITH MULTIPLEXED DIGIT LINES [patent_app_type] => utility [patent_app_number] => 18/421741 [patent_app_country] => US [patent_app_date] => 2024-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12051 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18421741 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/421741
MEMORY ARRAY WITH MULTIPLEXED DIGIT LINES Jan 23, 2024 Pending
Array ( [id] => 19993739 [patent_doc_number] => 20250131961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/419557 [patent_app_country] => US [patent_app_date] => 2024-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18419557 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/419557
SEMICONDUCTOR DEVICE Jan 22, 2024 Pending
Array ( [id] => 19321204 [patent_doc_number] => 20240242750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => FERROELECTRIC FET-BASED CONTENT-ADDRESSABLE MEMORY [patent_app_type] => utility [patent_app_number] => 18/420171 [patent_app_country] => US [patent_app_date] => 2024-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6541 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18420171 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/420171
Ferroelectric FET-based content-addressable memory Jan 22, 2024 Issued
Array ( [id] => 20124292 [patent_doc_number] => 20250239323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => NONVOLATILE MEMORY WITH TEMPERATURE-DEPENDENT SENSE TIME OFFSETS FOR SOFT-BIT READ [patent_app_type] => utility [patent_app_number] => 18/415703 [patent_app_country] => US [patent_app_date] => 2024-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18415703 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/415703
NONVOLATILE MEMORY WITH TEMPERATURE-DEPENDENT SENSE TIME OFFSETS FOR SOFT-BIT READ Jan 17, 2024 Pending
Array ( [id] => 20124292 [patent_doc_number] => 20250239323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => NONVOLATILE MEMORY WITH TEMPERATURE-DEPENDENT SENSE TIME OFFSETS FOR SOFT-BIT READ [patent_app_type] => utility [patent_app_number] => 18/415703 [patent_app_country] => US [patent_app_date] => 2024-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7241 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18415703 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/415703
NONVOLATILE MEMORY WITH TEMPERATURE-DEPENDENT SENSE TIME OFFSETS FOR SOFT-BIT READ Jan 17, 2024 Pending
Array ( [id] => 19160834 [patent_doc_number] => 20240153541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => Integrated Assemblies and Methods Forming Integrated Assemblies [patent_app_type] => utility [patent_app_number] => 18/413671 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413671 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/413671
Integrated Assemblies and Methods Forming Integrated Assemblies Jan 15, 2024 Pending
Array ( [id] => 20332866 [patent_doc_number] => 12463151 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => PUF memory devices and methods of manufacturing thereof [patent_app_type] => utility [patent_app_number] => 18/405926 [patent_app_country] => US [patent_app_date] => 2024-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 11409 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18405926 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/405926
PUF memory devices and methods of manufacturing thereof Jan 4, 2024 Issued
Array ( [id] => 19305224 [patent_doc_number] => 20240233804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => VOLTAGE SUPPLY CIRCUIT, MEMORY DEVICE INCLUDING THE SAME, AND OPERATING METHOD OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/404411 [patent_app_country] => US [patent_app_date] => 2024-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12123 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18404411 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/404411
VOLTAGE SUPPLY CIRCUIT, MEMORY DEVICE INCLUDING THE SAME, AND OPERATING METHOD OF MEMORY DEVICE Jan 3, 2024 Pending
Array ( [id] => 19305224 [patent_doc_number] => 20240233804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => VOLTAGE SUPPLY CIRCUIT, MEMORY DEVICE INCLUDING THE SAME, AND OPERATING METHOD OF MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/404411 [patent_app_country] => US [patent_app_date] => 2024-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12123 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18404411 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/404411
VOLTAGE SUPPLY CIRCUIT, MEMORY DEVICE INCLUDING THE SAME, AND OPERATING METHOD OF MEMORY DEVICE Jan 3, 2024 Pending
Array ( [id] => 20071879 [patent_doc_number] => 20250210101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => MICROELECTRONIC DEVICES AND MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/393416 [patent_app_country] => US [patent_app_date] => 2023-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25764 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18393416 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/393416
Microelectronic devices and memory devices Dec 20, 2023 Issued
Array ( [id] => 20036044 [patent_doc_number] => 20250174266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-29 [patent_title] => DECODER CIRCUITS, MEMORY DEVICES AND ITS CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/392745 [patent_app_country] => US [patent_app_date] => 2023-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12054 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18392745 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/392745
DECODER CIRCUITS, MEMORY DEVICES AND ITS CONTROL METHOD Dec 20, 2023 Pending
Array ( [id] => 20230367 [patent_doc_number] => 12419032 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-16 [patent_title] => Memory device including semiconductor element [patent_app_type] => utility [patent_app_number] => 18/545163 [patent_app_country] => US [patent_app_date] => 2023-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 3925 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 373 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18545163 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/545163
Memory device including semiconductor element Dec 18, 2023 Issued
Array ( [id] => 19100766 [patent_doc_number] => 20240119994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-11 [patent_title] => VERTICAL MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/542769 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19415 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542769 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/542769
Vertical memory device Dec 17, 2023 Issued
Array ( [id] => 19237051 [patent_doc_number] => 20240194246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => METHOD FOR CONTROLLING NAND FLASH MEMORY TO IMPLEMENT XNOR OPERATION [patent_app_type] => utility [patent_app_number] => 18/534834 [patent_app_country] => US [patent_app_date] => 2023-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10631 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 654 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18534834 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/534834
Method for controlling NAND flash memory to implement XNOR operation Dec 10, 2023 Issued
Array ( [id] => 19285367 [patent_doc_number] => 20240221844 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => NONVOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/532730 [patent_app_country] => US [patent_app_date] => 2023-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18289 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18532730 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/532730
Nonvolatile memory device and operating method thereof Dec 6, 2023 Issued
Array ( [id] => 19237079 [patent_doc_number] => 20240194274 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => MEMORY DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/531872 [patent_app_country] => US [patent_app_date] => 2023-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13194 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531872 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/531872
MEMORY DEVICE AND OPERATING METHOD THEREOF Dec 6, 2023 Issued
Array ( [id] => 19070842 [patent_doc_number] => 20240105268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => MEMORY DEVICE INCLUDING PASS TRANSISTOR CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/529897 [patent_app_country] => US [patent_app_date] => 2023-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14692 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18529897 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/529897
Memory device including pass transistor circuit Dec 4, 2023 Issued
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