Search

Viet Q. Nguyen

Examiner (ID: 10659, Phone: (571)272-1788 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2307, 2503, 2511, 2818, 2827, 2824
Total Applications
3976
Issued Applications
3621
Pending Applications
133
Abandoned Applications
252

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20482632 [patent_doc_number] => 12531108 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-20 [patent_title] => Memory device, operation method, and memory system [patent_app_type] => utility [patent_app_number] => 18/662519 [patent_app_country] => US [patent_app_date] => 2024-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 7023 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662519 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/662519
Memory device, operation method, and memory system May 12, 2024 Issued
Array ( [id] => 19618900 [patent_doc_number] => 20240404580 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => MULTI-DIE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/657631 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17679 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18657631 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/657631
MULTI-DIE MEMORY DEVICE May 6, 2024 Pending
Array ( [id] => 19435733 [patent_doc_number] => 20240304231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => MEMORY DEVICE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/657376 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 40439 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18657376 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/657376
Memory device and electronic device May 6, 2024 Issued
Array ( [id] => 19406878 [patent_doc_number] => 20240290389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => IN-LINE PROGRAMMING ADJUSTMENT OF A MEMORY CELL IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 18/654697 [patent_app_country] => US [patent_app_date] => 2024-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28968 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18654697 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/654697
In-line programming adjustment of a memory cell in a memory sub-system May 2, 2024 Issued
Array ( [id] => 19420764 [patent_doc_number] => 20240296888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/653785 [patent_app_country] => US [patent_app_date] => 2024-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13769 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18653785 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/653785
Semiconductor storage device May 1, 2024 Issued
Array ( [id] => 19515419 [patent_doc_number] => 20240347105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/635268 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6010 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635268 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635268
Random access memory and method of fabricating the same Apr 14, 2024 Issued
Array ( [id] => 19517795 [patent_doc_number] => 20240349481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING MEMORY ELEMENT [patent_app_type] => utility [patent_app_number] => 18/619444 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6960 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18619444 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/619444
SEMICONDUCTOR DEVICE INCLUDING MEMORY ELEMENT Mar 27, 2024 Abandoned
Array ( [id] => 20806031 [patent_doc_number] => 12670943 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-30 [patent_title] => Memory circuit and write method [patent_app_type] => utility [patent_app_number] => 18/615398 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2265 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615398 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/615398
Memory circuit and write method Mar 24, 2024 Issued
Array ( [id] => 19500136 [patent_doc_number] => 20240339154 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING MEMORY ELEMENT [patent_app_type] => utility [patent_app_number] => 18/609144 [patent_app_country] => US [patent_app_date] => 2024-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13036 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 353 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18609144 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/609144
Semiconductor device including memory element Mar 18, 2024 Issued
Array ( [id] => 19467672 [patent_doc_number] => 20240321342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => MEMORY DEVICE USING SEMICONDUCTOR ELEMENT [patent_app_type] => utility [patent_app_number] => 18/609167 [patent_app_country] => US [patent_app_date] => 2024-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8716 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18609167 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/609167
MEMORY DEVICE USING SEMICONDUCTOR ELEMENT Mar 18, 2024 Abandoned
Array ( [id] => 19706798 [patent_doc_number] => 12200860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Load reduced memory module [patent_app_type] => utility [patent_app_number] => 18/604133 [patent_app_country] => US [patent_app_date] => 2024-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 28 [patent_no_of_words] => 14301 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18604133 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/604133
Load reduced memory module Mar 12, 2024 Issued
Array ( [id] => 19466468 [patent_doc_number] => 20240320138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => NON-VOLATILE MEMORY AND ASSOCIATED CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/602059 [patent_app_country] => US [patent_app_date] => 2024-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8745 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18602059 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/602059
Non-volatile memory and associated control method Mar 11, 2024 Issued
Array ( [id] => 20977602 [patent_doc_number] => 12738306 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-09-15 [patent_title] => Magnetic tunnel junction with dual reference layers having parallel magnetization directions and methods for operating the same [patent_app_type] => utility [patent_app_number] => 18/600384 [patent_app_country] => US [patent_app_date] => 2024-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 1115 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18600384 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/600384
MAGNETIC TUNNEL JUNCTION WITH DUAL REFERENCE LAYERS HAVING PARALLEL MAGNETIZATION DIRECTIONS AND METHODS FOR OPERATING THE SAME Mar 7, 2024 Pending
Array ( [id] => 19269065 [patent_doc_number] => 20240212769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => MEMORY DEVICE AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/596412 [patent_app_country] => US [patent_app_date] => 2024-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12037 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18596412 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/596412
Memory device and method of operating the same Mar 4, 2024 Issued
Array ( [id] => 20868017 [patent_doc_number] => 12694925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-28 [patent_title] => Storage device [patent_app_type] => utility [patent_app_number] => 18/593233 [patent_app_country] => US [patent_app_date] => 2024-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 1221 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18593233 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/593233
STORAGE DEVICE Feb 29, 2024 Pending
Array ( [id] => 19392484 [patent_doc_number] => 20240282354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => PROTOCOL FOR MEMORY POWER-MODE CONTROL [patent_app_type] => utility [patent_app_number] => 18/590221 [patent_app_country] => US [patent_app_date] => 2024-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4610 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18590221 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/590221
PROTOCOL FOR MEMORY POWER-MODE CONTROL Feb 27, 2024 Pending
Array ( [id] => 19237057 [patent_doc_number] => 20240194252 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/584118 [patent_app_country] => US [patent_app_date] => 2024-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32832 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18584118 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/584118
Semiconductor device Feb 21, 2024 Issued
Array ( [id] => 19221208 [patent_doc_number] => 20240185912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => CIRCUIT MODULE WITH RELIABLE MARGIN CONFIGURATION [patent_app_type] => utility [patent_app_number] => 18/443358 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9226 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18443358 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/443358
Circuit module with reliable margin configuration Feb 15, 2024 Issued
Array ( [id] => 20182136 [patent_doc_number] => 20250266094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-21 [patent_title] => REAL TIME RAMP RATE ADJUSTMENT FOR BETTER PERFORMANCE AND CURRENT CONSUMPTION TRADEOFF [patent_app_type] => utility [patent_app_number] => 18/442709 [patent_app_country] => US [patent_app_date] => 2024-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18442709 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/442709
Real time ramp rate adjustment for better performance and current consumption tradeoff Feb 14, 2024 Issued
Array ( [id] => 19235903 [patent_doc_number] => 20240193098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => METHODS AND APPARATUS TO FACILITATE ATOMIC OPERATIONS IN VICTIM CACHE [patent_app_type] => utility [patent_app_number] => 18/442660 [patent_app_country] => US [patent_app_date] => 2024-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 95400 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18442660 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/442660
Methods and apparatus to facilitate atomic operations in victim cache Feb 14, 2024 Issued
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