Search

Viet Q. Nguyen

Examiner (ID: 18198, Phone: (571)272-1788 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2307, 2824, 2503, 2511, 2827, 2818
Total Applications
3921
Issued Applications
3581
Pending Applications
133
Abandoned Applications
252

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19057065 [patent_doc_number] => 20240099034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => LLC CHIP, CACHE SYSTEM AND METHOD FOR READING AND WRITING LLC CHIP [patent_app_type] => utility [patent_app_number] => 18/526281 [patent_app_country] => US [patent_app_date] => 2023-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5404 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526281 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/526281
LLC CHIP, CACHE SYSTEM AND METHOD FOR READING AND WRITING LLC CHIP Nov 30, 2023 Pending
Array ( [id] => 19057065 [patent_doc_number] => 20240099034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => LLC CHIP, CACHE SYSTEM AND METHOD FOR READING AND WRITING LLC CHIP [patent_app_type] => utility [patent_app_number] => 18/526281 [patent_app_country] => US [patent_app_date] => 2023-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5404 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18526281 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/526281
LLC CHIP, CACHE SYSTEM AND METHOD FOR READING AND WRITING LLC CHIP Nov 30, 2023 Pending
Array ( [id] => 19221189 [patent_doc_number] => 20240185893 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => WORDLINE CONTACT FORMATION FOR NAND DEVICE [patent_app_type] => utility [patent_app_number] => 18/525198 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6558 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18525198 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/525198
WORDLINE CONTACT FORMATION FOR NAND DEVICE Nov 29, 2023 Pending
Array ( [id] => 19052793 [patent_doc_number] => 20240094762 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => REGISTER CLOCK DRIVER WITH CHIP SELECT LOOPBACK [patent_app_type] => utility [patent_app_number] => 18/523438 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7317 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18523438 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/523438
Register clock driver with chip select loopback Nov 28, 2023 Issued
Array ( [id] => 20260527 [patent_doc_number] => 12432898 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-30 [patent_title] => Memory device having tiers of 2-transistor memory cells [patent_app_type] => utility [patent_app_number] => 18/521273 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 9555 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18521273 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/521273
Memory device having tiers of 2-transistor memory cells Nov 27, 2023 Issued
Array ( [id] => 19207988 [patent_doc_number] => 20240179887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => MEMORY-ELEMENT-INCLUDING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/520130 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 382 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520130 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/520130
MEMORY-ELEMENT-INCLUDING SEMICONDUCTOR DEVICE Nov 26, 2023 Abandoned
Array ( [id] => 19206250 [patent_doc_number] => 20240178149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => CHIP SELECT WIRING FOR A DUAL DEVICE PACKAGE [patent_app_type] => utility [patent_app_number] => 18/520405 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13140 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520405 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/520405
CHIP SELECT WIRING FOR A DUAL DEVICE PACKAGE Nov 26, 2023 Pending
Array ( [id] => 19207988 [patent_doc_number] => 20240179887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => MEMORY-ELEMENT-INCLUDING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/520130 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11334 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 382 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520130 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/520130
MEMORY-ELEMENT-INCLUDING SEMICONDUCTOR DEVICE Nov 26, 2023 Abandoned
Array ( [id] => 19055063 [patent_doc_number] => 20240097032 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => METHOD OF WRITING TO OR ERASING MULTI-BIT MEMORY STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/518716 [patent_app_country] => US [patent_app_date] => 2023-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13757 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518716 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/518716
Method of writing to or erasing multi-bit memory storage device Nov 23, 2023 Issued
Array ( [id] => 19452379 [patent_doc_number] => 20240312509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => BUFFER CHIP, SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY CHIP, AND MEMORY MODULE [patent_app_type] => utility [patent_app_number] => 18/507901 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7295 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18507901 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/507901
BUFFER CHIP, SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY CHIP, AND MEMORY MODULE Nov 12, 2023 Pending
Array ( [id] => 19634322 [patent_doc_number] => 20240412771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => EMBEDDED MEMORY DEVICE, INTEGRATED CIRCUIT HAVING THE SAME AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/507444 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6524 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18507444 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/507444
EMBEDDED MEMORY DEVICE, INTEGRATED CIRCUIT HAVING THE SAME AND METHOD OF OPERATING THE SAME Nov 12, 2023 Pending
Array ( [id] => 19452379 [patent_doc_number] => 20240312509 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => BUFFER CHIP, SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY CHIP, AND MEMORY MODULE [patent_app_type] => utility [patent_app_number] => 18/507901 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7295 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18507901 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/507901
BUFFER CHIP, SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY CHIP, AND MEMORY MODULE Nov 12, 2023 Pending
Array ( [id] => 19733568 [patent_doc_number] => 12211568 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-28 [patent_title] => Multi-fuse memory cell circuit and method [patent_app_type] => utility [patent_app_number] => 18/503276 [patent_app_country] => US [patent_app_date] => 2023-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4098 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18503276 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/503276
Multi-fuse memory cell circuit and method Nov 6, 2023 Issued
Array ( [id] => 19918418 [patent_doc_number] => 12293791 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Memory device including pass transistor circuit [patent_app_type] => utility [patent_app_number] => 18/504093 [patent_app_country] => US [patent_app_date] => 2023-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 9082 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18504093 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/504093
Memory device including pass transistor circuit Nov 6, 2023 Issued
Array ( [id] => 19022875 [patent_doc_number] => 20240079046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => NON-VOLATILE MEMORY DEVICE AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/387204 [patent_app_country] => US [patent_app_date] => 2023-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18387204 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/387204
Non-volatile memory device and control method Nov 5, 2023 Issued
Array ( [id] => 19022875 [patent_doc_number] => 20240079046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => NON-VOLATILE MEMORY DEVICE AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/387204 [patent_app_country] => US [patent_app_date] => 2023-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18387204 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/387204
Non-volatile memory device and control method Nov 5, 2023 Issued
Array ( [id] => 19022875 [patent_doc_number] => 20240079046 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => NON-VOLATILE MEMORY DEVICE AND CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 18/387204 [patent_app_country] => US [patent_app_date] => 2023-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18387204 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/387204
Non-volatile memory device and control method Nov 5, 2023 Issued
Array ( [id] => 19335337 [patent_doc_number] => 20240249767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => BUFFER CHIP, SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY CHIP, AND MEMORY MODULE [patent_app_type] => utility [patent_app_number] => 18/494614 [patent_app_country] => US [patent_app_date] => 2023-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10053 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18494614 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/494614
BUFFER CHIP, SEMICONDUCTOR PACKAGE INCLUDING BUFFER CHIP AND MEMORY CHIP, AND MEMORY MODULE Oct 24, 2023 Pending
Array ( [id] => 19269037 [patent_doc_number] => 20240212741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => Main Wordline Decoding Circuitry [patent_app_type] => utility [patent_app_number] => 18/493692 [patent_app_country] => US [patent_app_date] => 2023-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7689 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18493692 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/493692
Main Wordline Decoding Circuitry Oct 23, 2023 Pending
Array ( [id] => 19993737 [patent_doc_number] => 20250131959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/493553 [patent_app_country] => US [patent_app_date] => 2023-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18493553 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/493553
MEMORY DEVICE Oct 23, 2023 Pending
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