Search

Viet Q. Nguyen

Examiner (ID: 10659, Phone: (571)272-1788 , Office: P/2827 )

Most Active Art Unit
2827
Art Unit(s)
2307, 2503, 2511, 2818, 2827, 2824
Total Applications
3976
Issued Applications
3621
Pending Applications
133
Abandoned Applications
252

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18898349 [patent_doc_number] => 20240013834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-11 [patent_title] => Three Dimensional (3D) Memories with Multiple Resistive Change Elements per Cell and Corresponding Architectures for In-Memory Computing [patent_app_type] => utility [patent_app_number] => 18/370541 [patent_app_country] => US [patent_app_date] => 2023-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 73399 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18370541 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/370541
Three dimensional (3D) memories with multiple resistive change elements per cell and corresponding architectures for in-memory computing Sep 19, 2023 Issued
Array ( [id] => 19056999 [patent_doc_number] => 20240098968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => MEMORY DEVICE INCLUDING SEMICONDUCTOR ELEMENT [patent_app_type] => utility [patent_app_number] => 18/470090 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7227 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18470090 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/470090
MEMORY DEVICE INCLUDING SEMICONDUCTOR ELEMENT Sep 18, 2023 Abandoned
Array ( [id] => 19742888 [patent_doc_number] => 12219750 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Memory device having 2-transistor vertical memory cell and separate read and write gates [patent_app_type] => utility [patent_app_number] => 18/244069 [patent_app_country] => US [patent_app_date] => 2023-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 14545 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18244069 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/244069
Memory device having 2-transistor vertical memory cell and separate read and write gates Sep 7, 2023 Issued
Array ( [id] => 18868201 [patent_doc_number] => 20230422638 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => METHOD OF FABRICATING RESISTIVE RANDOM ACCESS MEMORY CELL [patent_app_type] => utility [patent_app_number] => 18/463268 [patent_app_country] => US [patent_app_date] => 2023-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3376 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18463268 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/463268
Method of fabricating resistive random access memory cell Sep 6, 2023 Issued
Array ( [id] => 19328585 [patent_doc_number] => 12046274 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Nonvolatile memory device, system including the same, and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 18/460683 [patent_app_country] => US [patent_app_date] => 2023-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 11920 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18460683 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/460683
Nonvolatile memory device, system including the same, and method for fabricating the same Sep 3, 2023 Issued
Array ( [id] => 19409089 [patent_doc_number] => 20240292600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/240516 [patent_app_country] => US [patent_app_date] => 2023-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12946 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18240516 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/240516
Memory device Aug 30, 2023 Issued
Array ( [id] => 18851112 [patent_doc_number] => 20230413516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/458054 [patent_app_country] => US [patent_app_date] => 2023-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12302 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18458054 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/458054
Semiconductor memory device Aug 28, 2023 Issued
Array ( [id] => 20119563 [patent_doc_number] => 12369301 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Memory device with semiconductor elements [patent_app_type] => utility [patent_app_number] => 18/453103 [patent_app_country] => US [patent_app_date] => 2023-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 4114 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18453103 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/453103
Memory device with semiconductor elements Aug 20, 2023 Issued
Array ( [id] => 18820817 [patent_doc_number] => 20230395158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => METHODS OF OPERATING MEMORY DEVICES BASED ON SUB-BLOCK POSITIONS AND RELATED MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 18/235838 [patent_app_country] => US [patent_app_date] => 2023-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20071 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18235838 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/235838
Methods of operating memory devices based on sub-block positions and related memory system Aug 18, 2023 Issued
Array ( [id] => 19116121 [patent_doc_number] => 20240127871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => ZQ CALIBRATION CIRCUIT, OPERATION METHOD OF THE ZQ CALIBRATION CIRCUIT, AND SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/235848 [patent_app_country] => US [patent_app_date] => 2023-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7354 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18235848 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/235848
ZQ calibration circuit, operation method of the ZQ calibration circuit, and semiconductor memory device Aug 18, 2023 Issued
Array ( [id] => 18823054 [patent_doc_number] => 20230397395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => MEMORY DEVICE INCLUDING SEMICONDUCTOR ELEMENT [patent_app_type] => utility [patent_app_number] => 18/235673 [patent_app_country] => US [patent_app_date] => 2023-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11180 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18235673 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/235673
MEMORY DEVICE INCLUDING SEMICONDUCTOR ELEMENT Aug 17, 2023 Abandoned
Array ( [id] => 18823056 [patent_doc_number] => 20230397397 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => SEMICONDUCTOR ELEMENT MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/450767 [patent_app_country] => US [patent_app_date] => 2023-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11887 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 434 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18450767 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/450767
SEMICONDUCTOR ELEMENT MEMORY DEVICE Aug 15, 2023 Abandoned
Array ( [id] => 19502074 [patent_doc_number] => 20240341092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => READ-ONLY MEMORY DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 18/446696 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19474 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18446696 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/446696
READ-ONLY MEMORY DEVICE AND METHOD Aug 8, 2023 Pending
Array ( [id] => 19378275 [patent_doc_number] => 12069872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-20 [patent_title] => Memory device and method of manufacturing memory device [patent_app_type] => utility [patent_app_number] => 18/231304 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 62 [patent_figures_cnt] => 62 [patent_no_of_words] => 26452 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231304 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/231304
Memory device and method of manufacturing memory device Aug 7, 2023 Issued
Array ( [id] => 18791152 [patent_doc_number] => 20230380139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => MEMORY APPARATUS USING SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/230905 [patent_app_country] => US [patent_app_date] => 2023-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13026 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 438 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18230905 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/230905
Memory apparatus using semiconductor devices Aug 6, 2023 Issued
Array ( [id] => 19757810 [patent_doc_number] => 20250046375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => INTEGRATED CIRCUIT INCLUDING FLASH MEMORY AND CMOS LOGIC CIRCUITRY [patent_app_type] => utility [patent_app_number] => 18/362080 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12324 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362080 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362080
INTEGRATED CIRCUIT INCLUDING FLASH MEMORY AND CMOS LOGIC CIRCUITRY Jul 30, 2023 Pending
Array ( [id] => 19531472 [patent_doc_number] => 20240355374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => MEMORY CIRCUITS WITH DYNAMICALLY ADJUSTABLE PULSE WIDTHS AND METHODS FOR OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/362168 [patent_app_country] => US [patent_app_date] => 2023-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18362168 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/362168
Memory circuits with dynamically adjustable pulse widths and methods for operating the same Jul 30, 2023 Issued
Array ( [id] => 18907824 [patent_doc_number] => 20240023309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => SEMICONDUCTOR ELEMENT MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/361478 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12912 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18361478 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/361478
SEMICONDUCTOR ELEMENT MEMORY DEVICE Jul 27, 2023 Abandoned
Array ( [id] => 18907862 [patent_doc_number] => 20240023347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => MEMORY ARRAY, MEMORY, PREPARING METHOD AND WRITING METHOD [patent_app_type] => utility [patent_app_number] => 18/359224 [patent_app_country] => US [patent_app_date] => 2023-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5701 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18359224 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/359224
Memory array, memory, preparing method and writing method Jul 25, 2023 Issued
Array ( [id] => 19386870 [patent_doc_number] => 20240276740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => INTEGRATED MEMORY AND CONTROL DIES [patent_app_type] => utility [patent_app_number] => 18/358638 [patent_app_country] => US [patent_app_date] => 2023-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9653 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18358638 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/358638
Integrated memory and control dies Jul 24, 2023 Issued
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