
Viktor Simkovic
Examiner (ID: 10581)
| Most Active Art Unit | 2812 |
| Art Unit(s) | 2812 |
| Total Applications | 255 |
| Issued Applications | 216 |
| Pending Applications | 18 |
| Abandoned Applications | 21 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1585326
[patent_doc_number] => 06358769
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-03-19
[patent_title] => 'Process for manufacturing mechanical, electromechanical and opto-electromechanical microstructures having suspended regions subject to mechanical stresses during assembly'
[patent_app_type] => B1
[patent_app_number] => 09/513476
[patent_app_country] => US
[patent_app_date] => 2000-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 9
[patent_no_of_words] => 1838
[patent_no_of_claims] => 37
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/358/06358769.pdf
[firstpage_image] =>[orig_patent_app_number] => 09513476
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/513476 | Process for manufacturing mechanical, electromechanical and opto-electromechanical microstructures having suspended regions subject to mechanical stresses during assembly | Feb 24, 2000 | Issued |
Array
(
[id] => 4381952
[patent_doc_number] => 06277756
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-21
[patent_title] => 'Method for manufacturing semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 9/501762
[patent_app_country] => US
[patent_app_date] => 2000-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 5491
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[patent_words_short_claim] => 133
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/277/06277756.pdf
[firstpage_image] =>[orig_patent_app_number] => 501762
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/501762 | Method for manufacturing semiconductor device | Feb 9, 2000 | Issued |
Array
(
[id] => 4258423
[patent_doc_number] => 06204135
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-20
[patent_title] => 'Method for patterning semiconductors with high precision, good homogeneity and reproducibility'
[patent_app_type] => 1
[patent_app_number] => 9/494782
[patent_app_country] => US
[patent_app_date] => 2000-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 5917
[patent_no_of_claims] => 19
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[patent_words_short_claim] => 117
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/204/06204135.pdf
[firstpage_image] =>[orig_patent_app_number] => 494782
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/494782 | Method for patterning semiconductors with high precision, good homogeneity and reproducibility | Jan 30, 2000 | Issued |
Array
(
[id] => 4404431
[patent_doc_number] => 06271065
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-07
[patent_title] => 'Method directed to the manufacture of an SOI device'
[patent_app_type] => 1
[patent_app_number] => 9/494352
[patent_app_country] => US
[patent_app_date] => 2000-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
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[patent_no_of_words] => 6711
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/271/06271065.pdf
[firstpage_image] =>[orig_patent_app_number] => 494352
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/494352 | Method directed to the manufacture of an SOI device | Jan 30, 2000 | Issued |
Array
(
[id] => 1564814
[patent_doc_number] => 06338976
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-01-15
[patent_title] => 'Method for forming optoelectronic microelectronic fabrication with attenuated bond pad corrosion'
[patent_app_type] => B1
[patent_app_number] => 09/489462
[patent_app_country] => US
[patent_app_date] => 2000-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[patent_no_of_words] => 5351
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/338/06338976.pdf
[firstpage_image] =>[orig_patent_app_number] => 09489462
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/489462 | Method for forming optoelectronic microelectronic fabrication with attenuated bond pad corrosion | Jan 20, 2000 | Issued |
| 09/483512 | Inert Gas Plasma for Stabilizing Wafer Temperature Prior to Plasma Processing | Jan 12, 2000 | Abandoned |
Array
(
[id] => 4258777
[patent_doc_number] => 06204157
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-03-20
[patent_title] => 'Method for establishing shallow junction in semiconductor device to minimize junction capacitance'
[patent_app_type] => 1
[patent_app_number] => 9/479492
[patent_app_country] => US
[patent_app_date] => 2000-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/204/06204157.pdf
[firstpage_image] =>[orig_patent_app_number] => 479492
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/479492 | Method for establishing shallow junction in semiconductor device to minimize junction capacitance | Jan 6, 2000 | Issued |
Array
(
[id] => 4359066
[patent_doc_number] => 06255227
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-07-03
[patent_title] => 'Etching process of CoSi2 layers'
[patent_app_type] => 1
[patent_app_number] => 9/478252
[patent_app_country] => US
[patent_app_date] => 2000-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 5021
[patent_no_of_claims] => 10
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/255/06255227.pdf
[firstpage_image] =>[orig_patent_app_number] => 478252
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/478252 | Etching process of CoSi2 layers | Jan 5, 2000 | Issued |
Array
(
[id] => 1503271
[patent_doc_number] => 06465263
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-10-15
[patent_title] => 'Method and apparatus for implementing corrected species by monitoring specific state parameters'
[patent_app_type] => B1
[patent_app_number] => 09/477252
[patent_app_country] => US
[patent_app_date] => 2000-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3469
[patent_no_of_claims] => 17
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/465/06465263.pdf
[firstpage_image] =>[orig_patent_app_number] => 09477252
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/477252 | Method and apparatus for implementing corrected species by monitoring specific state parameters | Jan 3, 2000 | Issued |
Array
(
[id] => 7064923
[patent_doc_number] => 20010044166
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2001-11-22
[patent_title] => 'METHOD FOR FORMING MICROLENSES WITH HIGH LIGHT TRANSMITTANCE IN IMAGE SENSOR'
[patent_app_type] => new
[patent_app_number] => 09/475011
[patent_app_country] => US
[patent_app_date] => 1999-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 1629
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0044/20010044166.pdf
[firstpage_image] =>[orig_patent_app_number] => 09475011
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/475011 | METHOD FOR FORMING MICROLENSES WITH HIGH LIGHT TRANSMITTANCE IN IMAGE SENSOR | Dec 29, 1999 | Abandoned |
Array
(
[id] => 4274710
[patent_doc_number] => 06281033
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-08-28
[patent_title] => 'Semiconductor dynamic quantity-sensor and method of manufacturing the same'
[patent_app_type] => 1
[patent_app_number] => 9/471712
[patent_app_country] => US
[patent_app_date] => 1999-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 40
[patent_no_of_words] => 4613
[patent_no_of_claims] => 11
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[pdf_file] => patents/06/281/06281033.pdf
[firstpage_image] =>[orig_patent_app_number] => 471712
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/471712 | Semiconductor dynamic quantity-sensor and method of manufacturing the same | Dec 22, 1999 | Issued |
Array
(
[id] => 4303155
[patent_doc_number] => 06326225
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-12-04
[patent_title] => 'Method of manufacturing liquid crystal device'
[patent_app_type] => 1
[patent_app_number] => 9/470102
[patent_app_country] => US
[patent_app_date] => 1999-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/06/326/06326225.pdf
[firstpage_image] =>[orig_patent_app_number] => 470102
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/470102 | Method of manufacturing liquid crystal device | Dec 20, 1999 | Issued |
Array
(
[id] => 4302819
[patent_doc_number] => 06187653
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-13
[patent_title] => 'Method for attractive bonding of two crystalline substrates'
[patent_app_type] => 1
[patent_app_number] => 9/465884
[patent_app_country] => US
[patent_app_date] => 1999-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
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[pdf_file] => patents/06/187/06187653.pdf
[firstpage_image] =>[orig_patent_app_number] => 465884
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/465884 | Method for attractive bonding of two crystalline substrates | Dec 16, 1999 | Issued |
Array
(
[id] => 4416816
[patent_doc_number] => 06194239
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2001-02-27
[patent_title] => 'Method for making thin film semiconductor'
[patent_app_type] => 1
[patent_app_number] => 9/454552
[patent_app_country] => US
[patent_app_date] => 1999-12-07
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[pdf_file] => patents/06/194/06194239.pdf
[firstpage_image] =>[orig_patent_app_number] => 454552
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/454552 | Method for making thin film semiconductor | Dec 6, 1999 | Issued |
Array
(
[id] => 4405118
[patent_doc_number] => 06232157
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[patent_kind] => NA
[patent_issue_date] => 2001-05-15
[patent_title] => 'Thin film transistors'
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[pdf_file] => patents/06/232/06232157.pdf
[firstpage_image] =>[orig_patent_app_number] => 450522
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/450522 | Thin film transistors | Nov 28, 1999 | Issued |
Array
(
[id] => 4152805
[patent_doc_number] => 06107124
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-08-22
[patent_title] => 'Charge coupled device and method of fabricating the same'
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[pdf_file] => patents/06/107/06107124.pdf
[firstpage_image] =>[orig_patent_app_number] => 447811
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/447811 | Charge coupled device and method of fabricating the same | Nov 22, 1999 | Issued |
Array
(
[id] => 4235586
[patent_doc_number] => 06165873
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-12-26
[patent_title] => 'Process for manufacturing a semiconductor integrated circuit device'
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[patent_app_number] => 9/447211
[patent_app_country] => US
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[pdf_file] => patents/06/165/06165873.pdf
[firstpage_image] =>[orig_patent_app_number] => 447211
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/447211 | Process for manufacturing a semiconductor integrated circuit device | Nov 22, 1999 | Issued |
Array
(
[id] => 1379067
[patent_doc_number] => 06555443
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-04-29
[patent_title] => 'Method for production of a thin film and a thin-film solar cell, in particular, on a carrier substrate'
[patent_app_type] => B1
[patent_app_number] => 09/438072
[patent_app_country] => US
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[pdf_file] => patents/06/555/06555443.pdf
[firstpage_image] =>[orig_patent_app_number] => 09438072
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/438072 | Method for production of a thin film and a thin-film solar cell, in particular, on a carrier substrate | Nov 9, 1999 | Issued |
Array
(
[id] => 4326432
[patent_doc_number] => 06319760
[patent_country] => US
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[patent_issue_date] => 2001-11-20
[patent_title] => 'Manufacturing method of liquid crystal display having high aperture ratio and high transmittance'
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[pdf_file] => patents/06/319/06319760.pdf
[firstpage_image] =>[orig_patent_app_number] => 428274
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/428274 | Manufacturing method of liquid crystal display having high aperture ratio and high transmittance | Oct 26, 1999 | Issued |
Array
(
[id] => 4406079
[patent_doc_number] => 06171933
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[patent_issue_date] => 2001-01-09
[patent_title] => 'Semiconductor wafer cleaving method and apparatus'
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[pdf_file] => patents/06/171/06171933.pdf
[firstpage_image] =>[orig_patent_app_number] => 403732
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/403732 | Semiconductor wafer cleaving method and apparatus | Oct 25, 1999 | Issued |