Search

Vincent A. Millin

Examiner (ID: 6943, Phone: (571)272-6747 , Office: P/3600 )

Most Active Art Unit
3302
Art Unit(s)
2165, 5332, 3312, 3304, 3302, 3624, 3305, 3738, 2164, 3303
Total Applications
1448
Issued Applications
1272
Pending Applications
92
Abandoned Applications
84

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 680091 [patent_doc_number] => 07089409 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-08 [patent_title] => 'Interface to a memory system for a processor having a replay system' [patent_app_type] => utility [patent_app_number] => 10/690634 [patent_app_country] => US [patent_app_date] => 2003-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 8184 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/089/07089409.pdf [firstpage_image] =>[orig_patent_app_number] => 10690634 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/690634
Interface to a memory system for a processor having a replay system Oct 22, 2003 Issued
Array ( [id] => 498085 [patent_doc_number] => 07216217 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-05-08 [patent_title] => 'Programmable processor with group floating-point operations' [patent_app_type] => utility [patent_app_number] => 10/646787 [patent_app_country] => US [patent_app_date] => 2003-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 148 [patent_figures_cnt] => 151 [patent_no_of_words] => 24479 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/216/07216217.pdf [firstpage_image] =>[orig_patent_app_number] => 10646787 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/646787
Programmable processor with group floating-point operations Aug 24, 2003 Issued
Array ( [id] => 7442400 [patent_doc_number] => 20040210679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'Command ordering based on dependencies' [patent_app_type] => new [patent_app_number] => 10/401258 [patent_app_country] => US [patent_app_date] => 2003-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4530 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20040210679.pdf [firstpage_image] =>[orig_patent_app_number] => 10401258 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/401258
Command ordering based on dependencies Mar 26, 2003 Issued
Array ( [id] => 7476985 [patent_doc_number] => 20040098564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'Status register update logic optimization' [patent_app_type] => new [patent_app_number] => 10/294577 [patent_app_country] => US [patent_app_date] => 2002-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2552 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20040098564.pdf [firstpage_image] =>[orig_patent_app_number] => 10294577 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/294577
Status register update logic optimization Nov 14, 2002 Issued
Array ( [id] => 6953879 [patent_doc_number] => 20050228974 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-13 [patent_title] => 'Apparatus and method for masked move to and from flags register in a processor' [patent_app_type] => utility [patent_app_number] => 10/279206 [patent_app_country] => US [patent_app_date] => 2002-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5183 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20050228974.pdf [firstpage_image] =>[orig_patent_app_number] => 10279206 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/279206
Apparatus and method for masked move to and from flags register in a processor Oct 21, 2002 Issued
Array ( [id] => 7233183 [patent_doc_number] => 20050262330 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'Apparatus and method for masked move to and from flags register in a processor' [patent_app_type] => utility [patent_app_number] => 10/279207 [patent_app_country] => US [patent_app_date] => 2002-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5184 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20050262330.pdf [firstpage_image] =>[orig_patent_app_number] => 10279207 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/279207
Apparatus and method for masked move to and from flags register in a processor Oct 21, 2002 Issued
Array ( [id] => 685457 [patent_doc_number] => 07082519 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-25 [patent_title] => 'System and method for instruction level multithreading scheduling in a embedded processor' [patent_app_type] => utility [patent_app_number] => 10/263068 [patent_app_country] => US [patent_app_date] => 2002-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 7818 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/082/07082519.pdf [firstpage_image] =>[orig_patent_app_number] => 10263068 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/263068
System and method for instruction level multithreading scheduling in a embedded processor Sep 30, 2002 Issued
Array ( [id] => 6715322 [patent_doc_number] => 20030026670 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Self-cleaning drill chuck' [patent_app_type] => new [patent_app_number] => 10/245609 [patent_app_country] => US [patent_app_date] => 2002-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4455 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20030026670.pdf [firstpage_image] =>[orig_patent_app_number] => 10245609 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/245609
Self-cleaning drill chuck Sep 15, 2002 Issued
Array ( [id] => 1275487 [patent_doc_number] => 06637306 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-28 [patent_title] => 'Lathe assembly and method of operating the lathe assembly' [patent_app_type] => B2 [patent_app_number] => 10/237838 [patent_app_country] => US [patent_app_date] => 2002-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 18 [patent_no_of_words] => 5740 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/637/06637306.pdf [firstpage_image] =>[orig_patent_app_number] => 10237838 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/237838
Lathe assembly and method of operating the lathe assembly Sep 8, 2002 Issued
Array ( [id] => 7605693 [patent_doc_number] => 07100029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-29 [patent_title] => 'Performing repeat string operations' [patent_app_type] => utility [patent_app_number] => 10/233155 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 5283 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/100/07100029.pdf [firstpage_image] =>[orig_patent_app_number] => 10233155 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/233155
Performing repeat string operations Aug 27, 2002 Issued
Array ( [id] => 582435 [patent_doc_number] => 07162620 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-09 [patent_title] => 'Methods and apparatus for multi-processing execution of computer instructions' [patent_app_type] => utility [patent_app_number] => 10/202355 [patent_app_country] => US [patent_app_date] => 2002-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5688 [patent_no_of_claims] => 52 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/162/07162620.pdf [firstpage_image] =>[orig_patent_app_number] => 10202355 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/202355
Methods and apparatus for multi-processing execution of computer instructions Jul 23, 2002 Issued
Array ( [id] => 757697 [patent_doc_number] => 07024539 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-04 [patent_title] => 'Resistor identification configuration circuitry and associated method' [patent_app_type] => utility [patent_app_number] => 10/190136 [patent_app_country] => US [patent_app_date] => 2002-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 9327 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/024/07024539.pdf [firstpage_image] =>[orig_patent_app_number] => 10190136 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/190136
Resistor identification configuration circuitry and associated method Jul 2, 2002 Issued
Array ( [id] => 757707 [patent_doc_number] => 07024542 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-04-04 [patent_title] => 'System and method of reducing the number of copies from alias registers to real registers in the commitment of instructions' [patent_app_type] => utility [patent_app_number] => 10/183096 [patent_app_country] => US [patent_app_date] => 2002-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5604 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/024/07024542.pdf [firstpage_image] =>[orig_patent_app_number] => 10183096 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/183096
System and method of reducing the number of copies from alias registers to real registers in the commitment of instructions Jun 25, 2002 Issued
Array ( [id] => 680077 [patent_doc_number] => 07089403 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-08 [patent_title] => 'System and method for using hardware performance monitors to evaluate and modify the behavior of an application during execution of the application' [patent_app_type] => utility [patent_app_number] => 10/180811 [patent_app_country] => US [patent_app_date] => 2002-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9777 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/089/07089403.pdf [firstpage_image] =>[orig_patent_app_number] => 10180811 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/180811
System and method for using hardware performance monitors to evaluate and modify the behavior of an application during execution of the application Jun 25, 2002 Issued
Array ( [id] => 7174958 [patent_doc_number] => 20040078656 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-22 [patent_title] => 'Method of saving/restoring processor state after entering/exiting debug mode' [patent_app_type] => new [patent_app_number] => 10/064253 [patent_app_country] => US [patent_app_date] => 2002-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2686 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20040078656.pdf [firstpage_image] =>[orig_patent_app_number] => 10064253 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/064253
Method of saving/restoring processor state after entering/exiting debug mode Jun 25, 2002 Abandoned
Array ( [id] => 6826347 [patent_doc_number] => 20030236969 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-25 [patent_title] => 'Method and apparatus of branch prediction' [patent_app_type] => new [patent_app_number] => 10/178555 [patent_app_country] => US [patent_app_date] => 2002-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2350 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20030236969.pdf [firstpage_image] =>[orig_patent_app_number] => 10178555 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/178555
Method and apparatus of branch prediction Jun 24, 2002 Issued
Array ( [id] => 6826345 [patent_doc_number] => 20030236967 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-25 [patent_title] => 'Intra-instruction fusion' [patent_app_type] => new [patent_app_number] => 10/180387 [patent_app_country] => US [patent_app_date] => 2002-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4278 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20030236967.pdf [firstpage_image] =>[orig_patent_app_number] => 10180387 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/180387
Intra-instruction fusion Jun 24, 2002 Issued
Array ( [id] => 6826341 [patent_doc_number] => 20030236963 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-25 [patent_title] => 'Method for fetching word instruction in a word-based processor and circuit to perform the same' [patent_app_type] => new [patent_app_number] => 10/064239 [patent_app_country] => US [patent_app_date] => 2002-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3271 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20030236963.pdf [firstpage_image] =>[orig_patent_app_number] => 10064239 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/064239
Method for fetching word instruction in a word-based processor and circuit to perform the same Jun 24, 2002 Abandoned
Array ( [id] => 6335936 [patent_doc_number] => 20020199081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-26 [patent_title] => 'Data processing system and control method' [patent_app_type] => new [patent_app_number] => 10/175446 [patent_app_country] => US [patent_app_date] => 2002-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9538 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20020199081.pdf [firstpage_image] =>[orig_patent_app_number] => 10175446 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/175446
Data processing system and control method Jun 19, 2002 Issued
Array ( [id] => 6826343 [patent_doc_number] => 20030236965 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-25 [patent_title] => 'Instruction set extension using operand bearing NOP instructions' [patent_app_type] => new [patent_app_number] => 10/176020 [patent_app_country] => US [patent_app_date] => 2002-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5506 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0236/20030236965.pdf [firstpage_image] =>[orig_patent_app_number] => 10176020 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/176020
Instruction set extension using operand bearing NOP instructions Jun 18, 2002 Issued
Menu