Search

Vincent A. Millin

Examiner (ID: 6943, Phone: (571)272-6747 , Office: P/3600 )

Most Active Art Unit
3302
Art Unit(s)
2165, 5332, 3312, 3304, 3302, 3624, 3305, 3738, 2164, 3303
Total Applications
1448
Issued Applications
1272
Pending Applications
92
Abandoned Applications
84

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6656271 [patent_doc_number] => 20030009652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'Data processing system and control method' [patent_app_type] => new [patent_app_number] => 10/171750 [patent_app_country] => US [patent_app_date] => 2002-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11760 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20030009652.pdf [firstpage_image] =>[orig_patent_app_number] => 10171750 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/171750
Data processing system and control method Jun 16, 2002 Abandoned
Array ( [id] => 6707625 [patent_doc_number] => 20030154359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-14 [patent_title] => 'Apparatus and method for extending a microprocessor instruction set' [patent_app_type] => new [patent_app_number] => 10/144595 [patent_app_country] => US [patent_app_date] => 2002-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6004 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20030154359.pdf [firstpage_image] =>[orig_patent_app_number] => 10144595 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/144595
Apparatus and method for extending a microprocessor instruction set May 8, 2002 Issued
Array ( [id] => 978761 [patent_doc_number] => 06934831 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-23 [patent_title] => 'Power reduction mechanism for floating point register file reads' [patent_app_type] => utility [patent_app_number] => 10/143311 [patent_app_country] => US [patent_app_date] => 2002-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3082 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/934/06934831.pdf [firstpage_image] =>[orig_patent_app_number] => 10143311 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/143311
Power reduction mechanism for floating point register file reads May 8, 2002 Issued
Array ( [id] => 609524 [patent_doc_number] => 07155598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-26 [patent_title] => 'Apparatus and method for conditional instruction execution' [patent_app_type] => utility [patent_app_number] => 10/144592 [patent_app_country] => US [patent_app_date] => 2002-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 7644 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/155/07155598.pdf [firstpage_image] =>[orig_patent_app_number] => 10144592 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/144592
Apparatus and method for conditional instruction execution May 8, 2002 Issued
Array ( [id] => 6788972 [patent_doc_number] => 20030140211 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-24 [patent_title] => 'Reconfigurable single instruction multiple data array' [patent_app_type] => new [patent_app_number] => 10/141567 [patent_app_country] => US [patent_app_date] => 2002-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3352 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20030140211.pdf [firstpage_image] =>[orig_patent_app_number] => 10141567 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/141567
Reconfigurable single instruction multiple data array May 7, 2002 Issued
Array ( [id] => 1128102 [patent_doc_number] => RE038571 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2004-08-31 [patent_title] => 'Automatic lathe and method of controlling same' [patent_app_type] => E1 [patent_app_number] => 10/139222 [patent_app_country] => US [patent_app_date] => 2002-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 9288 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/038/RE038571.pdf [firstpage_image] =>[orig_patent_app_number] => 10139222 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/139222
Automatic lathe and method of controlling same May 6, 2002 Issued
Array ( [id] => 1343991 [patent_doc_number] => 06568303 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-05-27 [patent_title] => 'Method and apparatus for cutting rings from ring forgings' [patent_app_type] => B1 [patent_app_number] => 10/128913 [patent_app_country] => US [patent_app_date] => 2002-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 4733 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/568/06568303.pdf [firstpage_image] =>[orig_patent_app_number] => 10128913 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/128913
Method and apparatus for cutting rings from ring forgings Apr 22, 2002 Issued
Array ( [id] => 6814994 [patent_doc_number] => 20030074544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-17 [patent_title] => 'Conditional execution with multiple destination stores' [patent_app_type] => new [patent_app_number] => 10/120161 [patent_app_country] => US [patent_app_date] => 2002-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11920 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20030074544.pdf [firstpage_image] =>[orig_patent_app_number] => 10120161 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/120161
Conditional execution with multiple destination stores Apr 10, 2002 Issued
Array ( [id] => 7621143 [patent_doc_number] => 06978358 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-12-20 [patent_title] => 'Executing stack-based instructions within a data processing apparatus arranged to apply operations to data items stored in registers' [patent_app_type] => utility [patent_app_number] => 10/113942 [patent_app_country] => US [patent_app_date] => 2002-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 10402 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/978/06978358.pdf [firstpage_image] =>[orig_patent_app_number] => 10113942 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/113942
Executing stack-based instructions within a data processing apparatus arranged to apply operations to data items stored in registers Apr 1, 2002 Issued
Array ( [id] => 6831479 [patent_doc_number] => 20030182537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-25 [patent_title] => 'Mechanism to assign more logical load/store tags than available physical registers in a microprocessor system' [patent_app_type] => new [patent_app_number] => 10/104728 [patent_app_country] => US [patent_app_date] => 2002-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4106 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20030182537.pdf [firstpage_image] =>[orig_patent_app_number] => 10104728 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/104728
Mechanism to assign more logical load/store tags than available physical registers in a microprocessor system Mar 20, 2002 Abandoned
Array ( [id] => 953348 [patent_doc_number] => 06961847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-11-01 [patent_title] => 'Method and apparatus for controlling execution of speculations in a processor based on monitoring power consumption' [patent_app_type] => utility [patent_app_number] => 10/103282 [patent_app_country] => US [patent_app_date] => 2002-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2154 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/961/06961847.pdf [firstpage_image] =>[orig_patent_app_number] => 10103282 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/103282
Method and apparatus for controlling execution of speculations in a processor based on monitoring power consumption Mar 19, 2002 Issued
Array ( [id] => 1001739 [patent_doc_number] => 06912649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-28 [patent_title] => 'Scheme to encode predicted values into an instruction stream/cache without additional bits/area' [patent_app_type] => utility [patent_app_number] => 10/097199 [patent_app_country] => US [patent_app_date] => 2002-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4154 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/912/06912649.pdf [firstpage_image] =>[orig_patent_app_number] => 10097199 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/097199
Scheme to encode predicted values into an instruction stream/cache without additional bits/area Mar 12, 2002 Issued
10/018780 Device for managing data exchanges between data processing equipment Mar 10, 2002 Abandoned
Array ( [id] => 6844518 [patent_doc_number] => 20030149865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-07 [patent_title] => 'Processor that eliminates mis-steering instruction fetch resulting from incorrect resolution of mis-speculated branch instructions' [patent_app_type] => new [patent_app_number] => 10/095397 [patent_app_country] => US [patent_app_date] => 2002-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12558 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20030149865.pdf [firstpage_image] =>[orig_patent_app_number] => 10095397 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/095397
Processor that eliminates mis-steering instruction fetch resulting from incorrect resolution of mis-speculated branch instructions Mar 10, 2002 Issued
Array ( [id] => 1310226 [patent_doc_number] => 06607333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-08-19 [patent_title] => 'Milling cutter and cutting insert therefor' [patent_app_type] => B2 [patent_app_number] => 10/091418 [patent_app_country] => US [patent_app_date] => 2002-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 10492 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/607/06607333.pdf [firstpage_image] =>[orig_patent_app_number] => 10091418 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/091418
Milling cutter and cutting insert therefor Mar 6, 2002 Issued
09/980974 Method and device for branching during the processing of a program by a processor Mar 5, 2002 Abandoned
Array ( [id] => 649062 [patent_doc_number] => 07120780 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-10-10 [patent_title] => 'Method of renaming registers in register file and microprocessor thereof' [patent_app_type] => utility [patent_app_number] => 10/087880 [patent_app_country] => US [patent_app_date] => 2002-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3589 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/120/07120780.pdf [firstpage_image] =>[orig_patent_app_number] => 10087880 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/087880
Method of renaming registers in register file and microprocessor thereof Mar 3, 2002 Issued
Array ( [id] => 626411 [patent_doc_number] => 07139904 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-21 [patent_title] => 'Data byte insertion circuitry' [patent_app_type] => utility [patent_app_number] => 10/087263 [patent_app_country] => US [patent_app_date] => 2002-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 5809 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/139/07139904.pdf [firstpage_image] =>[orig_patent_app_number] => 10087263 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/087263
Data byte insertion circuitry Feb 28, 2002 Issued
Array ( [id] => 7605700 [patent_doc_number] => 07100022 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-29 [patent_title] => 'Area and power efficient VLIW processor with improved speed' [patent_app_type] => utility [patent_app_number] => 10/085724 [patent_app_country] => US [patent_app_date] => 2002-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5246 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/100/07100022.pdf [firstpage_image] =>[orig_patent_app_number] => 10085724 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/085724
Area and power efficient VLIW processor with improved speed Feb 27, 2002 Issued
Array ( [id] => 6763158 [patent_doc_number] => 20030126520 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'System and method for separating exception vectors in a multiprocessor data processing system' [patent_app_type] => new [patent_app_number] => 09/683876 [patent_app_country] => US [patent_app_date] => 2002-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2889 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20030126520.pdf [firstpage_image] =>[orig_patent_app_number] => 09683876 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/683876
System and method for separating exception vectors in a multiprocessor data processing system Feb 25, 2002 Abandoned
Menu