Vincent N. Trans

Array ( [id] => 3573910 [patent_doc_number] => 05483461 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-09 [patent_title] => 'Routing algorithm method for standard-cell and gate-array integrated circuit design' [patent_app_type] => 1 [patent_app_number] => 8/074961 [patent_app_country] => US [patent_app_date] => 1993-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4726 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/483/05483461.pdf [firstpage_image] =>[orig_patent_app_number] => 074961 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3504430 [patent_doc_number] => 05508939 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-16 [patent_title] => 'Method of partitioning a circuit' [patent_app_type] => 1 [patent_app_number] => 8/075203 [patent_app_country] => US [patent_app_date] => 1993-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4642 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/508/05508939.pdf [firstpage_image] =>[orig_patent_app_number] => 075203 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3120202 [patent_doc_number] => 05465216 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-07 [patent_title] => 'Automatic design verification' [patent_app_type] => 1 [patent_app_number] => 8/071244 [patent_app_country] => US [patent_app_date] => 1993-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5262 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/465/05465216.pdf [firstpage_image] =>[orig_patent_app_number] => 071244 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3003654 [patent_doc_number] => 05367457 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-22 [patent_title] => 'Apparatus and method for improving accuracy of an automatic travelling apparatus' [patent_app_type] => 1 [patent_app_number] => 8/071222 [patent_app_country] => US [patent_app_date] => 1993-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 3759 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/367/05367457.pdf [firstpage_image] =>[orig_patent_app_number] => 071222 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3418765 [patent_doc_number] => 05461572 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-24 [patent_title] => 'Layout pattern verification apparatus' [patent_app_type] => 1 [patent_app_number] => 8/065904 [patent_app_country] => US [patent_app_date] => 1993-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 32 [patent_no_of_words] => 12338 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/461/05461572.pdf [firstpage_image] =>[orig_patent_app_number] => 065904 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3572289 [patent_doc_number] => 05526275 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-11 [patent_title] => 'Probe for in-circuit emulator with flexible printed circuit board' [patent_app_type] => 1 [patent_app_number] => 8/058932 [patent_app_country] => US [patent_app_date] => 1993-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2316 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/526/05526275.pdf [firstpage_image] =>[orig_patent_app_number] => 058932 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3427628 [patent_doc_number] => 05434794 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-18 [patent_title] => 'Method for automatically producing an implicit representation of the prime implicants of a function' [patent_app_type] => 1 [patent_app_number] => 8/054322 [patent_app_country] => US [patent_app_date] => 1993-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 9845 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/434/05434794.pdf [firstpage_image] =>[orig_patent_app_number] => 054322 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3463741 [patent_doc_number] => 05452230 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-19 [patent_title] => 'Logic circuit synthesizer' [patent_app_type] => 1 [patent_app_number] => 8/053007 [patent_app_country] => US [patent_app_date] => 1993-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 4257 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/452/05452230.pdf [firstpage_image] =>[orig_patent_app_number] => 053007 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3008775 [patent_doc_number] => 05359539 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-25 [patent_title] => 'Logic design system and circuit transformation rule compiler' [patent_app_type] => 1 [patent_app_number] => 8/052240 [patent_app_country] => US [patent_app_date] => 1993-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 6540 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/359/05359539.pdf [firstpage_image] =>[orig_patent_app_number] => 052240 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3504403 [patent_doc_number] => 05508937 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-16 [patent_title] => 'Incremental timing analysis' [patent_app_type] => 1 [patent_app_number] => 8/049699 [patent_app_country] => US [patent_app_date] => 1993-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 21 [patent_no_of_words] => 13660 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/508/05508937.pdf [firstpage_image] =>[orig_patent_app_number] => 049699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2972878 [patent_doc_number] => 05274570 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-28 [patent_title] => 'Integrated circuit having metal substrate' [patent_app_type] => 1 [patent_app_number] => 8/047387 [patent_app_country] => US [patent_app_date] => 1993-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 7122 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/274/05274570.pdf [firstpage_image] =>[orig_patent_app_number] => 047387 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3135245 [patent_doc_number] => 05436848 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-25 [patent_title] => 'Method of and device for transporting semiconductor substrate in semiconductor processing system' [patent_app_type] => 1 [patent_app_number] => 8/047449 [patent_app_country] => US [patent_app_date] => 1993-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 10783 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 428 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/436/05436848.pdf [firstpage_image] =>[orig_patent_app_number] => 047449 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2903669 [patent_doc_number] => 05272632 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-21 [patent_title] => 'Method of suppressing gear-shifting shock in an automatic-transmission vehicle' [patent_app_type] => 1 [patent_app_number] => 8/044087 [patent_app_country] => US [patent_app_date] => 1993-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3533 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/272/05272632.pdf [firstpage_image] =>[orig_patent_app_number] => 044087 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3563175 [patent_doc_number] => 05519632 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-21 [patent_title] => 'Automatic DCS routing for multilayer packages to minimize coupled noise' [patent_app_type] => 1 [patent_app_number] => 8/043074 [patent_app_country] => US [patent_app_date] => 1993-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3293 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/519/05519632.pdf [firstpage_image] =>[orig_patent_app_number] => 043074 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2997816 [patent_doc_number] => 05267175 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-30 [patent_title] => 'Data base access mechanism for rules utilized by a synthesis procedure for logic circuit design' [patent_app_type] => 1 [patent_app_number] => 8/042859 [patent_app_country] => US [patent_app_date] => 1993-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3564 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/267/05267175.pdf [firstpage_image] =>[orig_patent_app_number] => 042859 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3566503 [patent_doc_number] => 05502648 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-26 [patent_title] => 'Data processing method of generating integrated circuits using prime implicants' [patent_app_type] => 1 [patent_app_number] => 8/041546 [patent_app_country] => US [patent_app_date] => 1993-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 36 [patent_no_of_words] => 9467 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/502/05502648.pdf [firstpage_image] =>[orig_patent_app_number] => 041546 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3457774 [patent_doc_number] => 05386363 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-31 [patent_title] => 'Aircraft load management center' [patent_app_type] => 1 [patent_app_number] => 8/037186 [patent_app_country] => US [patent_app_date] => 1993-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1918 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/386/05386363.pdf [firstpage_image] =>[orig_patent_app_number] => 037186 [rel_patent_id] =>[rel_patent_doc_number] =>)