Search

Vincent N. Trans

Examiner (ID: 10207)

Most Active Art Unit
2304
Art Unit(s)
2763, 2304, 2899, OPET, 2787
Total Applications
1054
Issued Applications
820
Pending Applications
21
Abandoned Applications
213

Applications

Application numberTitle of the applicationFiling DateStatus
07/559737 ELECTRICAL INTERCONNECT INTEGRITY MEASURING METHOD Jul 29, 1990 Abandoned
Array ( [id] => 2785497 [patent_doc_number] => 05151872 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-09-29 [patent_title] => 'Method and apparatus for correcting the output of an onboard vehicle terrestrial magnetism sensor' [patent_app_type] => 1 [patent_app_number] => 7/556545 [patent_app_country] => US [patent_app_date] => 1990-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3522 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/151/05151872.pdf [firstpage_image] =>[orig_patent_app_number] => 556545 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/556545
Method and apparatus for correcting the output of an onboard vehicle terrestrial magnetism sensor Jul 23, 1990 Issued
Array ( [id] => 2800701 [patent_doc_number] => 05103413 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-07 [patent_title] => 'Travel detecting apparatus' [patent_app_type] => 1 [patent_app_number] => 7/554156 [patent_app_country] => US [patent_app_date] => 1990-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2336 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/103/05103413.pdf [firstpage_image] =>[orig_patent_app_number] => 554156 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/554156
Travel detecting apparatus Jul 18, 1990 Issued
Array ( [id] => 2813678 [patent_doc_number] => 05115397 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-19 [patent_title] => 'Surge-corrected fuel control apparatus for an internal combustion engine' [patent_app_type] => 1 [patent_app_number] => 7/547541 [patent_app_country] => US [patent_app_date] => 1990-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5221 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/115/05115397.pdf [firstpage_image] =>[orig_patent_app_number] => 547541 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/547541
Surge-corrected fuel control apparatus for an internal combustion engine Jul 2, 1990 Issued
07/545195 AUTOMOTIVE CRUISE CONTROL SYSTEM FOR CONTROLLING VEHICLE TO RUN AT CONSTANT SPEED Jun 27, 1990 Abandoned
Array ( [id] => 2978826 [patent_doc_number] => 05258919 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-02 [patent_title] => 'Structured logic design method using figures of merit and a flowchart methodology' [patent_app_type] => 1 [patent_app_number] => 7/546376 [patent_app_country] => US [patent_app_date] => 1990-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 62 [patent_no_of_words] => 22621 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/258/05258919.pdf [firstpage_image] =>[orig_patent_app_number] => 546376 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/546376
Structured logic design method using figures of merit and a flowchart methodology Jun 27, 1990 Issued
Array ( [id] => 2977575 [patent_doc_number] => 05202841 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-04-13 [patent_title] => 'Layout pattern verification system' [patent_app_type] => 1 [patent_app_number] => 7/544901 [patent_app_country] => US [patent_app_date] => 1990-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 8134 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/202/05202841.pdf [firstpage_image] =>[orig_patent_app_number] => 544901 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/544901
Layout pattern verification system Jun 27, 1990 Issued
Array ( [id] => 3024104 [patent_doc_number] => 05309371 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-03 [patent_title] => 'Method of and apparatus for designing circuit block layout in integrated circuit' [patent_app_type] => 1 [patent_app_number] => 7/543549 [patent_app_country] => US [patent_app_date] => 1990-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 45 [patent_no_of_words] => 10603 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/309/05309371.pdf [firstpage_image] =>[orig_patent_app_number] => 543549 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/543549
Method of and apparatus for designing circuit block layout in integrated circuit Jun 25, 1990 Issued
Array ( [id] => 2705205 [patent_doc_number] => 04991096 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-02-05 [patent_title] => 'Shutdown relay driver circuit' [patent_app_type] => 1 [patent_app_number] => 7/541450 [patent_app_country] => US [patent_app_date] => 1990-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 12442 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 458 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/991/04991096.pdf [firstpage_image] =>[orig_patent_app_number] => 541450 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/541450
Shutdown relay driver circuit Jun 20, 1990 Issued
Array ( [id] => 2857120 [patent_doc_number] => 05107427 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-21 [patent_title] => 'Error monitoring device for an electronic control unit in a motor vehicle' [patent_app_type] => 1 [patent_app_number] => 7/542249 [patent_app_country] => US [patent_app_date] => 1990-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2900 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/107/05107427.pdf [firstpage_image] =>[orig_patent_app_number] => 542249 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/542249
Error monitoring device for an electronic control unit in a motor vehicle Jun 20, 1990 Issued
Array ( [id] => 2955287 [patent_doc_number] => 05255203 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-19 [patent_title] => 'Interconnect structure for programmable logic device' [patent_app_type] => 1 [patent_app_number] => 7/538211 [patent_app_country] => US [patent_app_date] => 1990-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 58 [patent_no_of_words] => 15789 [patent_no_of_claims] => 47 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 318 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/255/05255203.pdf [firstpage_image] =>[orig_patent_app_number] => 538211 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/538211
Interconnect structure for programmable logic device Jun 13, 1990 Issued
07/537841 VISUAL INSPECTION SYSTEM Jun 12, 1990 Abandoned
Array ( [id] => 2943717 [patent_doc_number] => 05189629 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-23 [patent_title] => 'Method of logic gate reduction in a logic gate array' [patent_app_type] => 1 [patent_app_number] => 7/533985 [patent_app_country] => US [patent_app_date] => 1990-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2445 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/189/05189629.pdf [firstpage_image] =>[orig_patent_app_number] => 533985 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/533985
Method of logic gate reduction in a logic gate array Jun 5, 1990 Issued
Array ( [id] => 2679262 [patent_doc_number] => 05047949 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-10 [patent_title] => 'Standard cell LSI layout method' [patent_app_type] => 1 [patent_app_number] => 7/534358 [patent_app_country] => US [patent_app_date] => 1990-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 1937 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/047/05047949.pdf [firstpage_image] =>[orig_patent_app_number] => 534358 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/534358
Standard cell LSI layout method Jun 5, 1990 Issued
Array ( [id] => 2931417 [patent_doc_number] => 05200908 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-04-06 [patent_title] => 'Placement optimizing method/apparatus and apparatus for designing semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 7/533540 [patent_app_country] => US [patent_app_date] => 1990-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5521 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/200/05200908.pdf [firstpage_image] =>[orig_patent_app_number] => 533540 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/533540
Placement optimizing method/apparatus and apparatus for designing semiconductor devices Jun 4, 1990 Issued
07/532601 METHOD AND APPARATUS FOR INTERACTIVE SELF-MODELING MIXTURE ANALYSIS Jun 3, 1990 Abandoned
Array ( [id] => 2756668 [patent_doc_number] => 05016197 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-05-14 [patent_title] => 'Automated trash management system' [patent_app_type] => 1 [patent_app_number] => 7/532359 [patent_app_country] => US [patent_app_date] => 1990-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 8473 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/016/05016197.pdf [firstpage_image] =>[orig_patent_app_number] => 532359 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/532359
Automated trash management system May 31, 1990 Issued
Array ( [id] => 2864437 [patent_doc_number] => 05113345 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-12 [patent_title] => 'System for controlling active suspensions of a vehicle' [patent_app_type] => 1 [patent_app_number] => 7/526908 [patent_app_country] => US [patent_app_date] => 1990-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5908 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 373 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/113/05113345.pdf [firstpage_image] =>[orig_patent_app_number] => 526908 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/526908
System for controlling active suspensions of a vehicle May 21, 1990 Issued
07/524379 INTEGRATED CIRCUIT HAVING METAL SUBSTRATE May 16, 1990 Abandoned
Array ( [id] => 2949403 [patent_doc_number] => 05191542 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-03-02 [patent_title] => 'Automatic floorplan operation apparatus' [patent_app_type] => 1 [patent_app_number] => 7/523525 [patent_app_country] => US [patent_app_date] => 1990-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 25 [patent_no_of_words] => 6429 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/191/05191542.pdf [firstpage_image] =>[orig_patent_app_number] => 523525 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/523525
Automatic floorplan operation apparatus May 14, 1990 Issued
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