Search

Vincent Wall

Examiner (ID: 12320, Phone: (571)272-9567 , Office: P/2893 )

Most Active Art Unit
2822
Art Unit(s)
2898, 2893, 2822
Total Applications
944
Issued Applications
534
Pending Applications
123
Abandoned Applications
307

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19577368 [patent_doc_number] => 20240381660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => MEMORY CELL, CAPACITIVE MEMORY STRUCTURE, AND METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/777621 [patent_app_country] => US [patent_app_date] => 2024-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 27799 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18777621 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/777621
MEMORY CELL, CAPACITIVE MEMORY STRUCTURE, AND METHODS THEREOF Jul 18, 2024 Pending
Array ( [id] => 19560161 [patent_doc_number] => 20240371953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => TRANSISTOR, SEMICONDUCTOR STRUCTURE, AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/777485 [patent_app_country] => US [patent_app_date] => 2024-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18777485 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/777485
TRANSISTOR, SEMICONDUCTOR STRUCTURE, AND MANUFACTURING METHOD THEREOF Jul 17, 2024 Pending
Array ( [id] => 19559952 [patent_doc_number] => 20240371744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/775148 [patent_app_country] => US [patent_app_date] => 2024-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8041 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18775148 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/775148
ARRAY SUBSTRATE, DISPLAY PANEL AND DISPLAY DEVICE Jul 16, 2024 Pending
Array ( [id] => 19546680 [patent_doc_number] => 20240363716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => THIN FILM TRANSISTOR INCLUDING A COMPOSITIONALLY-GRADED GATE DIELECTRIC AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/770929 [patent_app_country] => US [patent_app_date] => 2024-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14655 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18770929 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/770929
THIN FILM TRANSISTOR INCLUDING A COMPOSITIONALLY-GRADED GATE DIELECTRIC AND METHODS FOR FORMING THE SAME Jul 11, 2024 Pending
Array ( [id] => 19696699 [patent_doc_number] => 20250015244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/763799 [patent_app_country] => US [patent_app_date] => 2024-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24394 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18763799 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/763799
DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME Jul 2, 2024 Pending
Array ( [id] => 19696649 [patent_doc_number] => 20250015194 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => Semiconductor Device [patent_app_type] => utility [patent_app_number] => 18/763108 [patent_app_country] => US [patent_app_date] => 2024-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 91242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18763108 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/763108
Semiconductor Device Jul 2, 2024 Pending
Array ( [id] => 20705656 [patent_doc_number] => 12628382 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-12 [patent_title] => Interfacial dual passivation layer for a ferroelectric device and methods of forming the same [patent_app_type] => utility [patent_app_number] => 18/757386 [patent_app_country] => US [patent_app_date] => 2024-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 32 [patent_no_of_words] => 5749 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18757386 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/757386
Interfacial dual passivation layer for a ferroelectric device and methods of forming the same Jun 26, 2024 Issued
Array ( [id] => 20900364 [patent_doc_number] => 12707644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-08-11 [patent_title] => Three-dimensional memory device with ferroelectric material [patent_app_type] => utility [patent_app_number] => 18/742325 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 3213 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18742325 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/742325
THREE-DIMENSIONAL MEMORY DEVICE WITH FERROELECTRIC MATERIAL Jun 12, 2024 Pending
Array ( [id] => 19866415 [patent_doc_number] => 20250105201 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-27 [patent_title] => SEMICONDUCTOR PACKAGE INCLUDING A BONDING WIRE [patent_app_type] => utility [patent_app_number] => 18/741372 [patent_app_country] => US [patent_app_date] => 2024-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8591 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18741372 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/741372
SEMICONDUCTOR PACKAGE INCLUDING A BONDING WIRE Jun 11, 2024 Pending
Array ( [id] => 19806314 [patent_doc_number] => 20250072239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/739513 [patent_app_country] => US [patent_app_date] => 2024-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17664 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18739513 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/739513
DISPLAY DEVICE Jun 10, 2024 Pending
Array ( [id] => 20399095 [patent_doc_number] => 20250374570 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-04 [patent_title] => SEMICONDUCTOR TRANSMITTER WITH INDIRECTLY-PATTERNED EMITTER [patent_app_type] => utility [patent_app_number] => 18/731016 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2063 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18731016 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/731016
SEMICONDUCTOR TRANSMITTER WITH INDIRECTLY-PATTERNED EMITTER May 30, 2024 Pending
Array ( [id] => 19468257 [patent_doc_number] => 20240321927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => IMAGING DEVICE, MANUFACTURING METHOD, AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/680445 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28425 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18680445 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/680445
IMAGING DEVICE, MANUFACTURING METHOD, AND ELECTRONIC DEVICE May 30, 2024 Pending
Array ( [id] => 20776505 [patent_doc_number] => 12660197 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-16 [patent_title] => Ferroelectric memory device and method of forming the same [patent_app_type] => utility [patent_app_number] => 18/677952 [patent_app_country] => US [patent_app_date] => 2024-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 57 [patent_no_of_words] => 6437 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18677952 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/677952
Ferroelectric memory device and method of forming the same May 29, 2024 Issued
Array ( [id] => 20821958 [patent_doc_number] => 12677446 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-07-07 [patent_title] => Semiconductor device and manufacturing method of the same [patent_app_type] => utility [patent_app_number] => 18/675249 [patent_app_country] => US [patent_app_date] => 2024-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 56 [patent_figures_cnt] => 154 [patent_no_of_words] => 56985 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18675249 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/675249
Semiconductor device and manufacturing method of the same May 27, 2024 Issued
Array ( [id] => 19619193 [patent_doc_number] => 20240404873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => INTEGRATED CIRCUIT CHIP COMPRISING A RADIOFREQUENCY COMPONENT [patent_app_type] => utility [patent_app_number] => 18/671424 [patent_app_country] => US [patent_app_date] => 2024-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4145 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671424 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/671424
INTEGRATED CIRCUIT CHIP COMPRISING A RADIOFREQUENCY COMPONENT May 21, 2024 Pending
Array ( [id] => 19407625 [patent_doc_number] => 20240291136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => Three-dimensional Heterogeneous Integrated Millimeter-wave System Package Structure [patent_app_type] => utility [patent_app_number] => 18/658201 [patent_app_country] => US [patent_app_date] => 2024-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5402 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18658201 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/658201
Three-dimensional Heterogeneous Integrated Millimeter-wave System Package Structure May 7, 2024 Abandoned
Array ( [id] => 19407360 [patent_doc_number] => 20240290871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => Forming 3D Transistors Using 2D Van Der WAALS Materials [patent_app_type] => utility [patent_app_number] => 18/657927 [patent_app_country] => US [patent_app_date] => 2024-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6418 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18657927 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/657927
Forming 3D transistors using 2D van der WAALS materials May 7, 2024 Issued
Array ( [id] => 20339092 [patent_doc_number] => 20250343212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-06 [patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/652774 [patent_app_country] => US [patent_app_date] => 2024-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18652774 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/652774
SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF Apr 30, 2024 Pending
Array ( [id] => 20065742 [patent_doc_number] => 20250203964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => Dielectric Frame Structures to Mitigate Lay-Out-Dependent Effect in Semiconductor Devices [patent_app_type] => utility [patent_app_number] => 18/649262 [patent_app_country] => US [patent_app_date] => 2024-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6097 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18649262 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/649262
Dielectric Frame Structures to Mitigate Lay-Out-Dependent Effect in Semiconductor Devices Apr 28, 2024 Pending
Array ( [id] => 20065642 [patent_doc_number] => 20250203864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING ELECTRODE AND ISOLATION PATTERN AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/647687 [patent_app_country] => US [patent_app_date] => 2024-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2301 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18647687 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/647687
SEMICONDUCTOR DEVICE INCLUDING ELECTRODE AND ISOLATION PATTERN AND METHOD OF FORMING THE SAME Apr 25, 2024 Pending
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