
Vincent Wall
Examiner (ID: 12320, Phone: (571)272-9567 , Office: P/2893 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2898, 2893, 2822 |
| Total Applications | 944 |
| Issued Applications | 534 |
| Pending Applications | 123 |
| Abandoned Applications | 307 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17278148
[patent_doc_number] => 20210384346
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-09
[patent_title] => SHIELDED GATE TRENCH MOSFET HAVING SUPER JUNCTION SURROUNDING LOWER PORTION OF TRENCHED GATES
[patent_app_type] => utility
[patent_app_number] => 16/891105
[patent_app_country] => US
[patent_app_date] => 2020-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5477
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16891105
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/891105 | SHIELDED GATE TRENCH MOSFET HAVING SUPER JUNCTION SURROUNDING LOWER PORTION OF TRENCHED GATES | Jun 2, 2020 | Abandoned |
Array
(
[id] => 17825939
[patent_doc_number] => 11430895
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-30
[patent_title] => Transistors including oxide semiconductive materials, and related microelectronic devices, memory devices, electronic systems, and methods
[patent_app_type] => utility
[patent_app_number] => 16/891462
[patent_app_country] => US
[patent_app_date] => 2020-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 19445
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16891462
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/891462 | Transistors including oxide semiconductive materials, and related microelectronic devices, memory devices, electronic systems, and methods | Jun 2, 2020 | Issued |
Array
(
[id] => 16905104
[patent_doc_number] => 20210184020
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-17
[patent_title] => Forming 3D Transistors Using 2D Van Der WAALS Materials
[patent_app_type] => utility
[patent_app_number] => 16/883271
[patent_app_country] => US
[patent_app_date] => 2020-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6353
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16883271
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/883271 | Forming 3D transistors using 2D van per waals materials | May 25, 2020 | Issued |
Array
(
[id] => 17780383
[patent_doc_number] => 20220246733
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-08-04
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/613393
[patent_app_country] => US
[patent_app_date] => 2020-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7888
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17613393
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/613393 | SEMICONDUCTOR DEVICE | May 21, 2020 | Abandoned |
Array
(
[id] => 18054132
[patent_doc_number] => 11527527
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-12-13
[patent_title] => Tap cell, integrated circuit structure and forming method thereof
[patent_app_type] => utility
[patent_app_number] => 16/880939
[patent_app_country] => US
[patent_app_date] => 2020-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 9462
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16880939
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/880939 | Tap cell, integrated circuit structure and forming method thereof | May 20, 2020 | Issued |
Array
(
[id] => 17232532
[patent_doc_number] => 20210359089
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-18
[patent_title] => Methods of Forming Conductive Pipes Between Neighboring Features, and Integrated Assemblies Having Conductive Pipes Between Neighboring Features
[patent_app_type] => utility
[patent_app_number] => 15/930090
[patent_app_country] => US
[patent_app_date] => 2020-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8439
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -49
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15930090
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/930090 | Methods of forming conductive pipes between neighboring features, and integrated assemblies having conductive pipes between neighboring features | May 11, 2020 | Issued |
Array
(
[id] => 17772615
[patent_doc_number] => 11404569
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-08-02
[patent_title] => Sidewall spacer structure to increase switching performance of ferroelectric memory device
[patent_app_type] => utility
[patent_app_number] => 16/868675
[patent_app_country] => US
[patent_app_date] => 2020-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 31
[patent_no_of_words] => 9908
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16868675
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/868675 | Sidewall spacer structure to increase switching performance of ferroelectric memory device | May 6, 2020 | Issued |
Array
(
[id] => 17956500
[patent_doc_number] => 11482615
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-25
[patent_title] => Super-junction power MOSFET device with improved ruggedness, and method of manufacturing
[patent_app_type] => utility
[patent_app_number] => 16/869026
[patent_app_country] => US
[patent_app_date] => 2020-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 4124
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 316
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16869026
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/869026 | Super-junction power MOSFET device with improved ruggedness, and method of manufacturing | May 6, 2020 | Issued |
Array
(
[id] => 17217954
[patent_doc_number] => 20210351292
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-11
[patent_title] => METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/866768
[patent_app_country] => US
[patent_app_date] => 2020-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6765
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 302
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16866768
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/866768 | METAL OXIDE SEMICONDUCTOR FIELD EFFECT TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME | May 4, 2020 | Abandoned |
Array
(
[id] => 16487941
[patent_doc_number] => 20200381550
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-03
[patent_title] => TRANSISTOR STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 16/867225
[patent_app_country] => US
[patent_app_date] => 2020-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5496
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16867225
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/867225 | Transistor structure | May 4, 2020 | Issued |
Array
(
[id] => 16617454
[patent_doc_number] => 20210036107
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-04
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/858274
[patent_app_country] => US
[patent_app_date] => 2020-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7135
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -2
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16858274
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/858274 | Semiconductor device | Apr 23, 2020 | Issued |
Array
(
[id] => 16827987
[patent_doc_number] => 20210143280
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-05-13
[patent_title] => THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF, ARRAY SUBSTRATE, AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/255787
[patent_app_country] => US
[patent_app_date] => 2020-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6866
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17255787
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/255787 | Thin film transistor and manufacturing method thereof, array substrate, and display device | Apr 16, 2020 | Issued |
Array
(
[id] => 17590873
[patent_doc_number] => 11329150
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-10
[patent_title] => Termination for trench field plate power MOSFET
[patent_app_type] => utility
[patent_app_number] => 16/848362
[patent_app_country] => US
[patent_app_date] => 2020-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 13
[patent_no_of_words] => 8197
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 237
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16848362
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/848362 | Termination for trench field plate power MOSFET | Apr 13, 2020 | Issued |
Array
(
[id] => 17159151
[patent_doc_number] => 20210320202
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-14
[patent_title] => Super Shielded Gate Trench MOSFET Having Superjunction Structure
[patent_app_type] => utility
[patent_app_number] => 16/845112
[patent_app_country] => US
[patent_app_date] => 2020-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4510
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 301
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16845112
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/845112 | Super Shielded Gate Trench MOSFET Having Superjunction Structure | Apr 9, 2020 | Abandoned |
Array
(
[id] => 16180454
[patent_doc_number] => 20200227423
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-16
[patent_title] => Ferroelectric Devices and Methods of Forming Ferroelectric Devices
[patent_app_type] => utility
[patent_app_number] => 16/834666
[patent_app_country] => US
[patent_app_date] => 2020-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5086
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16834666
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/834666 | Ferroelectric Devices and Methods of Forming Ferroelectric Devices | Mar 29, 2020 | Abandoned |
Array
(
[id] => 16509453
[patent_doc_number] => 20200388709
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-10
[patent_title] => THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING SAME, AND DISPLAY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 16/833139
[patent_app_country] => US
[patent_app_date] => 2020-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9734
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 30
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16833139
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/833139 | THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING SAME, AND DISPLAY APPARATUS | Mar 26, 2020 | Abandoned |
Array
(
[id] => 18219679
[patent_doc_number] => 11594629
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-02-28
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/829789
[patent_app_country] => US
[patent_app_date] => 2020-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 14542
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 677
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16829789
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/829789 | Semiconductor device | Mar 24, 2020 | Issued |
Array
(
[id] => 16796207
[patent_doc_number] => 20210126024
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-29
[patent_title] => Manufacturing Method for Array Substrate and Array Substrate
[patent_app_type] => utility
[patent_app_number] => 16/758430
[patent_app_country] => US
[patent_app_date] => 2020-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6648
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16758430
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/758430 | Manufacturing Method for Array Substrate and Array Substrate | Mar 22, 2020 | Abandoned |
Array
(
[id] => 16364713
[patent_doc_number] => 20200321464
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-10-08
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/827150
[patent_app_country] => US
[patent_app_date] => 2020-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8119
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 365
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16827150
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/827150 | Semiconductor device and method of manufacturing the same | Mar 22, 2020 | Issued |
Array
(
[id] => 16471893
[patent_doc_number] => 20200373431
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-26
[patent_title] => THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING SAME, AND DISPLAY APPARATUS
[patent_app_type] => utility
[patent_app_number] => 16/825983
[patent_app_country] => US
[patent_app_date] => 2020-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9309
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 163
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16825983
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/825983 | THIN FILM TRANSISTOR, METHOD FOR MANUFACTURING SAME, AND DISPLAY APPARATUS | Mar 19, 2020 | Abandoned |