Search

Vincent Wall

Examiner (ID: 12320, Phone: (571)272-9567 , Office: P/2893 )

Most Active Art Unit
2822
Art Unit(s)
2898, 2893, 2822
Total Applications
944
Issued Applications
534
Pending Applications
123
Abandoned Applications
307

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14827827 [patent_doc_number] => 10410928 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-10 [patent_title] => Homogeneous densification of fill layers for controlled reveal of vertical fins [patent_app_type] => utility [patent_app_number] => 15/824537 [patent_app_country] => US [patent_app_date] => 2017-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 7801 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15824537 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/824537
Homogeneous densification of fill layers for controlled reveal of vertical fins Nov 27, 2017 Issued
Array ( [id] => 18952611 [patent_doc_number] => 11895931 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-06 [patent_title] => Frequency tuning of multi-qubit systems [patent_app_type] => utility [patent_app_number] => 15/824492 [patent_app_country] => US [patent_app_date] => 2017-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 11710 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15824492 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/824492
Frequency tuning of multi-qubit systems Nov 27, 2017 Issued
Array ( [id] => 13470527 [patent_doc_number] => 20180286806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => SEMICONDUCTOR DEVICE HAVING MULTILAYER INTERCONNECTION STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/824968 [patent_app_country] => US [patent_app_date] => 2017-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15824968 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/824968
SEMICONDUCTOR DEVICE HAVING MULTILAYER INTERCONNECTION STRUCTURE AND METHOD OF MANUFACTURING THE SAME Nov 27, 2017 Abandoned
Array ( [id] => 14137907 [patent_doc_number] => 20190103343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => POWER MODULE FOR VEHICLE [patent_app_type] => utility [patent_app_number] => 15/824114 [patent_app_country] => US [patent_app_date] => 2017-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5762 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15824114 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/824114
Power module for vehicle Nov 27, 2017 Issued
Array ( [id] => 14374867 [patent_doc_number] => 20190161346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => WAFER LEVEL INTEGRATED MEMS DEVICE ENABLED BY SILICON PILLAR AND SMART CAP [patent_app_type] => utility [patent_app_number] => 15/823969 [patent_app_country] => US [patent_app_date] => 2017-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9327 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15823969 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/823969
Wafer level integrated MEMS device enabled by silicon pillar and smart cap Nov 27, 2017 Issued
Array ( [id] => 17381155 [patent_doc_number] => 11239188 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-01 [patent_title] => Terminal structure of a power semiconductor device [patent_app_type] => utility [patent_app_number] => 15/817810 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 8209 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 272 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15817810 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/817810
Terminal structure of a power semiconductor device Nov 19, 2017 Issued
Array ( [id] => 12759598 [patent_doc_number] => 20180145034 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-24 [patent_title] => Methods To Selectively Deposit Corrosion-Free Metal Contacts [patent_app_type] => utility [patent_app_number] => 15/817985 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4200 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15817985 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/817985
Methods To Selectively Deposit Corrosion-Free Metal Contacts Nov 19, 2017 Abandoned
Array ( [id] => 12760060 [patent_doc_number] => 20180145188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-24 [patent_title] => STACKED SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 15/817965 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3343 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 430 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15817965 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/817965
STACKED SEMICONDUCTOR STRUCTURE Nov 19, 2017 Abandoned
Array ( [id] => 16448544 [patent_doc_number] => 10840476 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-17 [patent_title] => Organic light emitting display device [patent_app_type] => utility [patent_app_number] => 15/818222 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11933 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15818222 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/818222
Organic light emitting display device Nov 19, 2017 Issued
Array ( [id] => 14801257 [patent_doc_number] => 10403639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-03 [patent_title] => Three-dimensional memory device having on-pitch drain select gate electrodes and method of making the same [patent_app_type] => utility [patent_app_number] => 15/818146 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 94 [patent_figures_cnt] => 100 [patent_no_of_words] => 31905 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 313 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15818146 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/818146
Three-dimensional memory device having on-pitch drain select gate electrodes and method of making the same Nov 19, 2017 Issued
Array ( [id] => 12759679 [patent_doc_number] => 20180145061 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-05-24 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 15/818346 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9065 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15818346 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/818346
Semiconductor package Nov 19, 2017 Issued
Array ( [id] => 14350499 [patent_doc_number] => 20190157222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => PACKAGE WITH ISOLATION STRUCTURE [patent_app_type] => utility [patent_app_number] => 15/818004 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6422 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15818004 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/818004
PACKAGE WITH ISOLATION STRUCTURE Nov 19, 2017 Abandoned
Array ( [id] => 14492343 [patent_doc_number] => 10332972 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => Single column compound semiconductor bipolar junction transistor fabricated on III-V compound semiconductor surface [patent_app_type] => utility [patent_app_number] => 15/818377 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 36 [patent_no_of_words] => 6297 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15818377 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/818377
Single column compound semiconductor bipolar junction transistor fabricated on III-V compound semiconductor surface Nov 19, 2017 Issued
Array ( [id] => 14333163 [patent_doc_number] => 10297610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Three-dimensional memory device having on-pitch drain select gate electrodes and method of making the same [patent_app_type] => utility [patent_app_number] => 15/818061 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 94 [patent_figures_cnt] => 100 [patent_no_of_words] => 33377 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 297 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15818061 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/818061
Three-dimensional memory device having on-pitch drain select gate electrodes and method of making the same Nov 19, 2017 Issued
Array ( [id] => 14350481 [patent_doc_number] => 20190157213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-23 [patent_title] => SEMICONDUCTOR STRUCTURE WITH SUBSTANTIALLY STRAIGHT CONTACT PROFILE [patent_app_type] => utility [patent_app_number] => 15/817801 [patent_app_country] => US [patent_app_date] => 2017-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2155 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15817801 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/817801
SEMICONDUCTOR STRUCTURE WITH SUBSTANTIALLY STRAIGHT CONTACT PROFILE Nov 19, 2017 Abandoned
Array ( [id] => 12236225 [patent_doc_number] => 20180069088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'TUNABLE BREAKDOWN VOLTAGE RF FET DEVICES' [patent_app_type] => utility [patent_app_number] => 15/811810 [patent_app_country] => US [patent_app_date] => 2017-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4778 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15811810 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/811810
Tunable breakdown voltage RF FET devices Nov 13, 2017 Issued
Array ( [id] => 12236238 [patent_doc_number] => 20180069101 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-08 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR FIN STRUCTURE WITH EXTENDING GATE STRUCTURE' [patent_app_type] => utility [patent_app_number] => 15/804787 [patent_app_country] => US [patent_app_date] => 2017-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5111 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15804787 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/804787
Method for manufacturing semiconductor fin structure with extending gate structure Nov 5, 2017 Issued
Array ( [id] => 13799663 [patent_doc_number] => 20190013370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => WOLED DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 15/741170 [patent_app_country] => US [patent_app_date] => 2017-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2757 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15741170 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/741170
WOLED DISPLAY PANEL AND DISPLAY DEVICE Oct 23, 2017 Abandoned
Array ( [id] => 16889163 [patent_doc_number] => 20210175360 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-10 [patent_title] => THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 15/779970 [patent_app_country] => US [patent_app_date] => 2017-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4541 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15779970 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/779970
THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME Oct 12, 2017 Abandoned
Array ( [id] => 16098743 [patent_doc_number] => 20200203358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-25 [patent_title] => FERROELECTRICS USING THIN ALLOY OF PARA-ELECTRIC MATERIALS [patent_app_type] => utility [patent_app_number] => 16/642358 [patent_app_country] => US [patent_app_date] => 2017-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7646 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16642358 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/642358
FERROELECTRICS USING THIN ALLOY OF PARA-ELECTRIC MATERIALS Sep 26, 2017 Abandoned
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