
Vincent Wall
Examiner (ID: 12320, Phone: (571)272-9567 , Office: P/2893 )
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2898, 2893, 2822 |
| Total Applications | 944 |
| Issued Applications | 534 |
| Pending Applications | 123 |
| Abandoned Applications | 307 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10971771
[patent_doc_number] => 20140374807
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-25
[patent_title] => 'METHOD OF DEVICE ISOLATION IN CLADDING Si THROUGH IN SITU DOPING'
[patent_app_type] => utility
[patent_app_number] => 13/921265
[patent_app_country] => US
[patent_app_date] => 2013-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3064
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13921265
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/921265 | METHOD OF DEVICE ISOLATION IN CLADDING Si THROUGH IN SITU DOPING | Jun 18, 2013 | Abandoned |
Array
(
[id] => 10971730
[patent_doc_number] => 20140374765
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-25
[patent_title] => 'Gate Stack for Normally-Off Compound Semiconductor Transistor'
[patent_app_type] => utility
[patent_app_number] => 13/921630
[patent_app_country] => US
[patent_app_date] => 2013-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4891
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13921630
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/921630 | Gate stack for normally-off compound semiconductor transistor | Jun 18, 2013 | Issued |
Array
(
[id] => 10971772
[patent_doc_number] => 20140374806
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-25
[patent_title] => 'FOUR TERMINAL TRANSISTOR'
[patent_app_type] => utility
[patent_app_number] => 13/921258
[patent_app_country] => US
[patent_app_date] => 2013-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 6213
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13921258
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/921258 | FOUR TERMINAL TRANSISTOR | Jun 18, 2013 | Abandoned |
Array
(
[id] => 10971727
[patent_doc_number] => 20140374762
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-25
[patent_title] => 'CIRCUIT INCLUDING FOUR TERMINAL TRANSISTOR'
[patent_app_type] => utility
[patent_app_number] => 13/921267
[patent_app_country] => US
[patent_app_date] => 2013-06-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 6221
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13921267
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/921267 | CIRCUIT INCLUDING FOUR TERMINAL TRANSISTOR | Jun 18, 2013 | Abandoned |
Array
(
[id] => 10230292
[patent_doc_number] => 20150115286
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-30
[patent_title] => 'SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/400365
[patent_app_country] => US
[patent_app_date] => 2013-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 10005
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14400365
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/400365 | Silicon carbide semiconductor device and method for producing the same | Jun 5, 2013 | Issued |
Array
(
[id] => 10230325
[patent_doc_number] => 20150115319
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-30
[patent_title] => 'PLANAR AVALANCHE PHOTODIODE'
[patent_app_type] => utility
[patent_app_number] => 14/400478
[patent_app_country] => US
[patent_app_date] => 2013-05-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2022
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14400478
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/400478 | PLANAR AVALANCHE PHOTODIODE | May 16, 2013 | Abandoned |
Array
(
[id] => 10245067
[patent_doc_number] => 20150130062
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-14
[patent_title] => 'Method for Manufacturing Germanide Interconnect Structures and Corresponding Interconnect Structures'
[patent_app_type] => utility
[patent_app_number] => 14/400769
[patent_app_country] => US
[patent_app_date] => 2013-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 8033
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14400769
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/400769 | Method for manufacturing germamde interconnect structures and corresponding interconnect structures | May 13, 2013 | Issued |
Array
(
[id] => 12969475
[patent_doc_number] => 09876066
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-01-23
[patent_title] => Device and structure and method for forming the same
[patent_app_type] => utility
[patent_app_number] => 14/401421
[patent_app_country] => US
[patent_app_date] => 2013-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 42
[patent_figures_cnt] => 62
[patent_no_of_words] => 17156
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 196
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14401421
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/401421 | Device and structure and method for forming the same | May 13, 2013 | Issued |
Array
(
[id] => 10584011
[patent_doc_number] => 09306139
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-04-05
[patent_title] => 'Light emitting device, method of fabricating the same and lighting system'
[patent_app_type] => utility
[patent_app_number] => 13/891051
[patent_app_country] => US
[patent_app_date] => 2013-05-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 50
[patent_no_of_words] => 18527
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13891051
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/891051 | Light emitting device, method of fabricating the same and lighting system | May 8, 2013 | Issued |
Array
(
[id] => 10238122
[patent_doc_number] => 20150123117
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-07
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME'
[patent_app_type] => utility
[patent_app_number] => 14/400592
[patent_app_country] => US
[patent_app_date] => 2013-04-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 10403
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14400592
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/400592 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME | Apr 25, 2013 | Abandoned |
Array
(
[id] => 10252304
[patent_doc_number] => 20150137300
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-21
[patent_title] => 'Infrared Sensor Device and Method for Producing an Infrared Sensor Device'
[patent_app_type] => utility
[patent_app_number] => 14/400461
[patent_app_country] => US
[patent_app_date] => 2013-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4173
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14400461
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/400461 | Infrared sensor device and method for producing an infrared sensor device | Apr 18, 2013 | Issued |
Array
(
[id] => 9132050
[patent_doc_number] => 20130292763
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-07
[patent_title] => 'Semiconductor Devices Having Reduced On Resistance'
[patent_app_type] => utility
[patent_app_number] => 13/865506
[patent_app_country] => US
[patent_app_date] => 2013-04-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 6601
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13865506
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/865506 | Semiconductor Devices Having Reduced On Resistance | Apr 17, 2013 | Abandoned |
Array
(
[id] => 9508725
[patent_doc_number] => 20140145216
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-05-29
[patent_title] => 'LED WITH WIRE SUPPORT'
[patent_app_type] => utility
[patent_app_number] => 13/859739
[patent_app_country] => US
[patent_app_date] => 2013-04-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 1689
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859739
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/859739 | LED WITH WIRE SUPPORT | Apr 9, 2013 | Abandoned |
Array
(
[id] => 9091272
[patent_doc_number] => 20130270583
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-17
[patent_title] => 'METHOD OF FORMING COPPER WIRING AND METHOD OF MANUFACTURING DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/859428
[patent_app_country] => US
[patent_app_date] => 2013-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3929
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859428
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/859428 | METHOD OF FORMING COPPER WIRING AND METHOD OF MANUFACTURING DISPLAY DEVICE | Apr 8, 2013 | Abandoned |
Array
(
[id] => 9079147
[patent_doc_number] => 20130264677
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-10
[patent_title] => 'METHOD FOR PRODUCING AN ELECTRONIC DEVICE BY ASSEMBLING SEMI-CONDUCTING BLOCKS AND CORRESPONDING DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/859418
[patent_app_country] => US
[patent_app_date] => 2013-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 6081
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859418
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/859418 | Method for producing an electronic device by assembling semi-conducting blocks and corresponding device | Apr 8, 2013 | Issued |
Array
(
[id] => 10870162
[patent_doc_number] => 08895357
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-11-25
[patent_title] => 'Integrated circuit and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 13/857091
[patent_app_country] => US
[patent_app_date] => 2013-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 22
[patent_no_of_words] => 2314
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13857091
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/857091 | Integrated circuit and method of manufacturing the same | Apr 3, 2013 | Issued |
Array
(
[id] => 9131989
[patent_doc_number] => 20130292702
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-11-07
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME'
[patent_app_type] => utility
[patent_app_number] => 13/856912
[patent_app_country] => US
[patent_app_date] => 2013-04-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5776
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13856912
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/856912 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME | Apr 3, 2013 | Abandoned |
Array
(
[id] => 10531251
[patent_doc_number] => 09257392
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-02-09
[patent_title] => 'Semiconductor package with through silicon via interconnect'
[patent_app_type] => utility
[patent_app_number] => 13/855873
[patent_app_country] => US
[patent_app_date] => 2013-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3606
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13855873
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/855873 | Semiconductor package with through silicon via interconnect | Apr 2, 2013 | Issued |
Array
(
[id] => 9121503
[patent_doc_number] => 20130288425
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-31
[patent_title] => 'END POINT DETECTION FOR BACK CONTACT SOLAR CELL LASER VIA DRILLING'
[patent_app_type] => utility
[patent_app_number] => 13/852966
[patent_app_country] => US
[patent_app_date] => 2013-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 7539
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13852966
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/852966 | END POINT DETECTION FOR BACK CONTACT SOLAR CELL LASER VIA DRILLING | Mar 27, 2013 | Abandoned |
Array
(
[id] => 9051147
[patent_doc_number] => 20130248861
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-26
[patent_title] => 'Integrated Power Transistor Circuit Having a Current-Measuring Cell'
[patent_app_type] => utility
[patent_app_number] => 13/848767
[patent_app_country] => US
[patent_app_date] => 2013-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5054
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13848767
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/848767 | Integrated power transistor circuit having a current-measuring cell | Mar 21, 2013 | Issued |