Search

Vincent Wall

Examiner (ID: 5266, Phone: (571)272-9567 , Office: P/2893 )

Most Active Art Unit
2822
Art Unit(s)
2898, 2893, 2822
Total Applications
875
Issued Applications
495
Pending Applications
124
Abandoned Applications
302

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17833767 [patent_doc_number] => 20220271071 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => METHOD OF FORMING BACKSIDE ILLUMINATED IMAGE SENSOR DEVICE WITH SHIELDING LAYER [patent_app_type] => utility [patent_app_number] => 17/744175 [patent_app_country] => US [patent_app_date] => 2022-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1608 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17744175 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/744175
Method of forming backside illuminated image sensor device with shielding layer May 12, 2022 Issued
Array ( [id] => 18696473 [patent_doc_number] => 20230326912 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => MULTI-CHIP 3D STACKING PACKAGING STRUCTURE AND PACKAGING METHOD WITH HIGH HEAT DISSIPATION EFFICIENCY [patent_app_type] => utility [patent_app_number] => 17/719233 [patent_app_country] => US [patent_app_date] => 2022-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17719233 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/719233
MULTI-CHIP 3D STACKING PACKAGING STRUCTURE AND PACKAGING METHOD WITH HIGH HEAT DISSIPATION EFFICIENCY Apr 11, 2022 Pending
Array ( [id] => 18317677 [patent_doc_number] => 11631763 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-18 [patent_title] => Termination for trench field plate power MOSFET [patent_app_type] => utility [patent_app_number] => 17/657944 [patent_app_country] => US [patent_app_date] => 2022-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 8225 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17657944 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/657944
Termination for trench field plate power MOSFET Apr 3, 2022 Issued
Array ( [id] => 17738304 [patent_doc_number] => 20220223766 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => MONOLITHIC SEGMENTED LED ARRAY ARCHITECTURE WITH REDUCED AREA PHOSPHOR EMISSION SURFACE [patent_app_type] => utility [patent_app_number] => 17/710547 [patent_app_country] => US [patent_app_date] => 2022-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12381 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17710547 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/710547
Monolithic segmented LED array architecture with reduced area phosphor emission surface Mar 30, 2022 Issued
Array ( [id] => 17723724 [patent_doc_number] => 20220216446 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-07 [patent_title] => DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 17/703470 [patent_app_country] => US [patent_app_date] => 2022-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7114 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17703470 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/703470
Display panel Mar 23, 2022 Issued
Array ( [id] => 18759815 [patent_doc_number] => 11810853 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Top electrode interconnect structures [patent_app_type] => utility [patent_app_number] => 17/702255 [patent_app_country] => US [patent_app_date] => 2022-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 3414 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17702255 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/702255
Top electrode interconnect structures Mar 22, 2022 Issued
Array ( [id] => 17708985 [patent_doc_number] => 20220208993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/697953 [patent_app_country] => US [patent_app_date] => 2022-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5626 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17697953 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/697953
Semiconductor structure and manufacturing method thereof Mar 17, 2022 Issued
Array ( [id] => 18040377 [patent_doc_number] => 20220384594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR HAVING ENHANCED HIGH-FREQUENCY PERFORMANCE [patent_app_type] => utility [patent_app_number] => 17/684849 [patent_app_country] => US [patent_app_date] => 2022-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17684849 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/684849
METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR HAVING ENHANCED HIGH-FREQUENCY PERFORMANCE Mar 1, 2022 Pending
Array ( [id] => 17780156 [patent_doc_number] => 20220246506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => PACKAGE MODULE [patent_app_type] => utility [patent_app_number] => 17/685227 [patent_app_country] => US [patent_app_date] => 2022-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13787 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17685227 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/685227
Package module Mar 1, 2022 Issued
Array ( [id] => 18040377 [patent_doc_number] => 20220384594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR HAVING ENHANCED HIGH-FREQUENCY PERFORMANCE [patent_app_type] => utility [patent_app_number] => 17/684849 [patent_app_country] => US [patent_app_date] => 2022-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15628 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17684849 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/684849
METAL-OXIDE-SEMICONDUCTOR FIELD-EFFECT TRANSISTOR HAVING ENHANCED HIGH-FREQUENCY PERFORMANCE Mar 1, 2022 Pending
Array ( [id] => 19981920 [patent_doc_number] => 12349422 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 17/679390 [patent_app_country] => US [patent_app_date] => 2022-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 1887 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 298 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17679390 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/679390
Semiconductor device Feb 23, 2022 Issued
Array ( [id] => 19029931 [patent_doc_number] => 11929295 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-12 [patent_title] => Multi-use package architecture [patent_app_type] => utility [patent_app_number] => 17/677843 [patent_app_country] => US [patent_app_date] => 2022-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 34 [patent_no_of_words] => 8785 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17677843 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/677843
Multi-use package architecture Feb 21, 2022 Issued
Array ( [id] => 17583281 [patent_doc_number] => 20220140136 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/578079 [patent_app_country] => US [patent_app_date] => 2022-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9447 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 448 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17578079 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/578079
Semiconductor device and method of manufacturing semiconductor device Jan 17, 2022 Issued
Array ( [id] => 17551707 [patent_doc_number] => 20220123049 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-21 [patent_title] => MULTILAYERED MAGNETIC FREE LAYER STRUCTURE FOR SPIN-TRANSFER TORQUE (STT) MRAM [patent_app_type] => utility [patent_app_number] => 17/562662 [patent_app_country] => US [patent_app_date] => 2021-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3248 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17562662 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/562662
MULTILAYERED MAGNETIC FREE LAYER STRUCTURE FOR SPIN-TRANSFER TORQUE (STT) MRAM Dec 26, 2021 Pending
Array ( [id] => 17709014 [patent_doc_number] => 20220209022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => STRUCTURE FOR A FIELD EFFECT TRANSISTOR (FET) DEVICE AND METHOD OF PROCESSING A FET DEVICE [patent_app_type] => utility [patent_app_number] => 17/646072 [patent_app_country] => US [patent_app_date] => 2021-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17646072 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/646072
STRUCTURE FOR A FIELD EFFECT TRANSISTOR (FET) DEVICE AND METHOD OF PROCESSING A FET DEVICE Dec 26, 2021 Pending
Array ( [id] => 17709014 [patent_doc_number] => 20220209022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => STRUCTURE FOR A FIELD EFFECT TRANSISTOR (FET) DEVICE AND METHOD OF PROCESSING A FET DEVICE [patent_app_type] => utility [patent_app_number] => 17/646072 [patent_app_country] => US [patent_app_date] => 2021-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5552 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17646072 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/646072
STRUCTURE FOR A FIELD EFFECT TRANSISTOR (FET) DEVICE AND METHOD OF PROCESSING A FET DEVICE Dec 26, 2021 Pending
Array ( [id] => 18387470 [patent_doc_number] => 11658265 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-23 [patent_title] => Method of manufacturing light emitting diodes and light emitting diode [patent_app_type] => utility [patent_app_number] => 17/645656 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 5334 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17645656 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/645656
Method of manufacturing light emitting diodes and light emitting diode Dec 21, 2021 Issued
Array ( [id] => 17536723 [patent_doc_number] => 20220115332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-14 [patent_title] => Method and Device for Reducing Metal Burrs When Sawing Semiconductor Packages [patent_app_type] => utility [patent_app_number] => 17/645257 [patent_app_country] => US [patent_app_date] => 2021-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3903 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17645257 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/645257
Method and device for reducing metal burrs when sawing semiconductor packages Dec 19, 2021 Issued
Array ( [id] => 19468363 [patent_doc_number] => 20240322033 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => VERTICAL POWER TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/255760 [patent_app_country] => US [patent_app_date] => 2021-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2231 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18255760 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/255760
VERTICAL POWER TRANSISTOR Dec 1, 2021 Pending
Array ( [id] => 17676620 [patent_doc_number] => 20220189787 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/535276 [patent_app_country] => US [patent_app_date] => 2021-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3188 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17535276 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/535276
Manufacturing method of semiconductor device Nov 23, 2021 Issued
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