Search

Vinh P Nguyen

Examiner (ID: 15293, Phone: (571)272-1964 , Office: P/2867 )

Most Active Art Unit
2858
Art Unit(s)
2607, 2829, 3621, 2213, 2899, 2867, 2731, 2858
Total Applications
3579
Issued Applications
3061
Pending Applications
115
Abandoned Applications
402

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14138205 [patent_doc_number] => 20190103492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-04 [patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICE INVOLVING FORMING EPITAXIAL MATERIAL [patent_app_type] => utility [patent_app_number] => 15/722801 [patent_app_country] => US [patent_app_date] => 2017-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3191 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15722801 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/722801
METHOD FOR FABRICATING SEMICONDUCTOR DEVICE INVOLVING FORMING EPITAXIAL MATERIAL Oct 1, 2017 Abandoned
Array ( [id] => 17516891 [patent_doc_number] => 11296052 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => TSV-less die stacking using plated pillars/through mold interconnect [patent_app_type] => utility [patent_app_number] => 16/639085 [patent_app_country] => US [patent_app_date] => 2017-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 56 [patent_no_of_words] => 26627 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16639085 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/639085
TSV-less die stacking using plated pillars/through mold interconnect Sep 29, 2017 Issued
Array ( [id] => 18639564 [patent_doc_number] => 11764187 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Semiconductor packages, and methods for forming semiconductor packages [patent_app_type] => utility [patent_app_number] => 16/641241 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 49 [patent_no_of_words] => 18455 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16641241 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/641241
Semiconductor packages, and methods for forming semiconductor packages Sep 28, 2017 Issued
Array ( [id] => 16132493 [patent_doc_number] => 10700014 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-30 [patent_title] => Method of manufacturing semiconductor package [patent_app_type] => utility [patent_app_number] => 15/721118 [patent_app_country] => US [patent_app_date] => 2017-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 24 [patent_no_of_words] => 10052 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15721118 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/721118
Method of manufacturing semiconductor package Sep 28, 2017 Issued
Array ( [id] => 12129285 [patent_doc_number] => 20180012871 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'RECESSED AND EMBEDDED DIE CORELESS PACKAGE' [patent_app_type] => utility [patent_app_number] => 15/711880 [patent_app_country] => US [patent_app_date] => 2017-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2499 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15711880 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/711880
RECESSED AND EMBEDDED DIE CORELESS PACKAGE Sep 20, 2017 Abandoned
Array ( [id] => 13559301 [patent_doc_number] => 20180331198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-15 [patent_title] => THIN OXIDE ZERO THRESHOLD VOLTAGE (ZVT) TRANSISTOR FABRICATION [patent_app_type] => utility [patent_app_number] => 15/709332 [patent_app_country] => US [patent_app_date] => 2017-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8672 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15709332 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/709332
THIN OXIDE ZERO THRESHOLD VOLTAGE (ZVT) TRANSISTOR FABRICATION Sep 18, 2017 Abandoned
Array ( [id] => 15169801 [patent_doc_number] => 10490404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => Method of in situ hard mask removal [patent_app_type] => utility [patent_app_number] => 15/708206 [patent_app_country] => US [patent_app_date] => 2017-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5365 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15708206 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/708206
Method of in situ hard mask removal Sep 18, 2017 Issued
Array ( [id] => 12615057 [patent_doc_number] => 20180096849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-05 [patent_title] => PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING EXPOSING A SUBSTRATE TO AN OXIDIZING AMBIENT [patent_app_type] => utility [patent_app_number] => 15/708447 [patent_app_country] => US [patent_app_date] => 2017-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7705 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15708447 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/708447
Process of forming an electronic device including exposing a substrate to an oxidizing ambient Sep 18, 2017 Issued
Array ( [id] => 15064155 [patent_doc_number] => 10462405 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Solid-state imaging device and manufacturing method therefor [patent_app_type] => utility [patent_app_number] => 15/702097 [patent_app_country] => US [patent_app_date] => 2017-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 12037 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15702097 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/702097
Solid-state imaging device and manufacturing method therefor Sep 11, 2017 Issued
Array ( [id] => 13349959 [patent_doc_number] => 20180226519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-08-09 [patent_title] => METHOD OF MANUFACTURING FINGER ELECTRODE FOR SOLAR CELL AND FINGER ELECTRODE FOR SOLAR CELL MANUFACTURED THEREBY [patent_app_type] => utility [patent_app_number] => 15/698873 [patent_app_country] => US [patent_app_date] => 2017-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4547 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15698873 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/698873
Method of manufacturing finger electrode for solar cell and finger electrode for solar cell manufactured thereby Sep 7, 2017 Issued
Array ( [id] => 12129680 [patent_doc_number] => 20180013265 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-11 [patent_title] => 'MANUFACTURABLE LASER DIODE FORMED ON C-PLANE GALLIUM AND NITROGEN MATERIAL' [patent_app_type] => utility [patent_app_number] => 15/694641 [patent_app_country] => US [patent_app_date] => 2017-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 31663 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15694641 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/694641
Manufacturable laser diode formed on c-plane gallium and nitrogen material Aug 31, 2017 Issued
Array ( [id] => 13893703 [patent_doc_number] => 10199407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Light-receiving device and photo-detection apparatus with such light-receiving device [patent_app_type] => utility [patent_app_number] => 15/687699 [patent_app_country] => US [patent_app_date] => 2017-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4837 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15687699 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/687699
Light-receiving device and photo-detection apparatus with such light-receiving device Aug 27, 2017 Issued
Array ( [id] => 16048081 [patent_doc_number] => 10685924 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-16 [patent_title] => Antenna-on-package arrangements [patent_app_type] => utility [patent_app_number] => 15/686131 [patent_app_country] => US [patent_app_date] => 2017-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 33 [patent_no_of_words] => 7442 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15686131 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/686131
Antenna-on-package arrangements Aug 23, 2017 Issued
Array ( [id] => 13996181 [patent_doc_number] => 20190067248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => SEMICONDUCTOR DEVICE HAVING LATERALLY OFFSET STACKED SEMICONDUCTOR DIES [patent_app_type] => utility [patent_app_number] => 15/686029 [patent_app_country] => US [patent_app_date] => 2017-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8402 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15686029 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/686029
SEMICONDUCTOR DEVICE HAVING LATERALLY OFFSET STACKED SEMICONDUCTOR DIES Aug 23, 2017 Abandoned
Array ( [id] => 14554493 [patent_doc_number] => 10345702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-09 [patent_title] => Polymer brushes for extreme ultraviolet photolithography [patent_app_type] => utility [patent_app_number] => 15/686045 [patent_app_country] => US [patent_app_date] => 2017-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5882 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15686045 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/686045
Polymer brushes for extreme ultraviolet photolithography Aug 23, 2017 Issued
Array ( [id] => 12223292 [patent_doc_number] => 20180061652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-01 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/683058 [patent_app_country] => US [patent_app_date] => 2017-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3849 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15683058 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/683058
Method for manufacturing semiconductor device Aug 21, 2017 Issued
Array ( [id] => 12208610 [patent_doc_number] => 20180053836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/682113 [patent_app_country] => US [patent_app_date] => 2017-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6087 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15682113 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/682113
Thin film transistor, manufacturing method thereof, and display device including the same Aug 20, 2017 Issued
Array ( [id] => 12208427 [patent_doc_number] => 20180053653 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-22 [patent_title] => 'GAS FLOW CONTROL FOR EPI THICKNESS UNIFORMITY IMPROVEMENT' [patent_app_type] => utility [patent_app_number] => 15/682171 [patent_app_country] => US [patent_app_date] => 2017-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6831 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15682171 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/682171
Gas flow control for EPI thickness uniformity improvement Aug 20, 2017 Issued
Array ( [id] => 14446271 [patent_doc_number] => 20190181009 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-06-13 [patent_title] => APPARATUS FOR ANNEALING A LAYER OF SEMICONDUCTOR MATERIAL, A METHOD OF ANNEALING A LAYER OF SEMICONDUCTOR MATERIAL, AND A FLAT PANEL DISPLAY [patent_app_type] => utility [patent_app_number] => 16/327186 [patent_app_country] => US [patent_app_date] => 2017-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7295 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16327186 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/327186
APPARATUS FOR ANNEALING A LAYER OF SEMICONDUCTOR MATERIAL, A METHOD OF ANNEALING A LAYER OF SEMICONDUCTOR MATERIAL, AND A FLAT PANEL DISPLAY Aug 15, 2017 Abandoned
Array ( [id] => 15250271 [patent_doc_number] => 10510664 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-12-17 [patent_title] => Contact structure and formation thereof [patent_app_type] => utility [patent_app_number] => 15/675967 [patent_app_country] => US [patent_app_date] => 2017-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 33 [patent_no_of_words] => 4887 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15675967 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/675967
Contact structure and formation thereof Aug 13, 2017 Issued
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