Search

Vinod Kumar

Examiner (ID: 19043, Phone: (571)272-4445 , Office: P/1663 )

Most Active Art Unit
1663
Art Unit(s)
1638, 1663
Total Applications
1866
Issued Applications
1391
Pending Applications
138
Abandoned Applications
373

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19278990 [patent_doc_number] => 12029136 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Magnetic memory device including magnetoresistance effect element [patent_app_type] => utility [patent_app_number] => 17/202151 [patent_app_country] => US [patent_app_date] => 2021-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4524 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202151 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/202151
Magnetic memory device including magnetoresistance effect element Mar 14, 2021 Issued
Array ( [id] => 20274885 [patent_doc_number] => 12444670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-14 [patent_title] => Power module [patent_app_type] => utility [patent_app_number] => 17/909471 [patent_app_country] => US [patent_app_date] => 2021-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 0 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17909471 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/909471
Power module Mar 7, 2021 Issued
Array ( [id] => 17878564 [patent_doc_number] => 11450587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-20 [patent_title] => Heat removal mechanism for stack-based electronic device with process control component and processing components [patent_app_type] => utility [patent_app_number] => 17/249493 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 11 [patent_no_of_words] => 11063 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17249493 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/249493
Heat removal mechanism for stack-based electronic device with process control component and processing components Mar 2, 2021 Issued
Array ( [id] => 18379728 [patent_doc_number] => 20230154817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => ELECTRIC ASSEMBLY INCLUDING HEAT SPREADING LAYER [patent_app_type] => utility [patent_app_number] => 17/917070 [patent_app_country] => US [patent_app_date] => 2021-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5343 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17917070 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/917070
Electric assembly including heat spreading layer Mar 2, 2021 Issued
Array ( [id] => 16951904 [patent_doc_number] => 20210210596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-08 [patent_title] => SEMICONDUCTOR STRUCTURES INCLUDING MIDDLE-OF-LINE (MOL) CAPACITANCE REDUCTION FOR SELF-ALIGNED CONTACT IN GATE STACK [patent_app_type] => utility [patent_app_number] => 17/188350 [patent_app_country] => US [patent_app_date] => 2021-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4464 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17188350 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/188350
Semiconductor structures including middle-of-line (MOL) capacitance reduction for self-aligned contact in gate stack Feb 28, 2021 Issued
Array ( [id] => 18308682 [patent_doc_number] => 20230112582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => Power Module Device with an Embedded Power Semiconductor Device [patent_app_type] => utility [patent_app_number] => 17/913662 [patent_app_country] => US [patent_app_date] => 2021-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8393 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17913662 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/913662
Power module device with an embedded power semiconductor device Feb 24, 2021 Issued
Array ( [id] => 19781531 [patent_doc_number] => 12230569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Apparatus and method to increase effective capacitance with layout staples [patent_app_type] => utility [patent_app_number] => 17/177055 [patent_app_country] => US [patent_app_date] => 2021-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 15210 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17177055 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/177055
Apparatus and method to increase effective capacitance with layout staples Feb 15, 2021 Issued
Array ( [id] => 17795621 [patent_doc_number] => 20220254713 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-11 [patent_title] => SEMICONDUCTOR DEVICE WITH POLYMER-BASED INSULATING MATERIAL AND METHOD OF PRODUCING THEREOF [patent_app_type] => utility [patent_app_number] => 17/173863 [patent_app_country] => US [patent_app_date] => 2021-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6254 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17173863 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/173863
Semiconductor device with polymer-based insulating material and method of producing thereof Feb 10, 2021 Issued
Array ( [id] => 16873660 [patent_doc_number] => 20210167127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => CROSS-POINT MEMORY ARRAY AND RELATED FABRICATION TECHNIQUES [patent_app_type] => utility [patent_app_number] => 17/174027 [patent_app_country] => US [patent_app_date] => 2021-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 39144 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17174027 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/174027
Cross-point memory array and related fabrication techniques Feb 10, 2021 Issued
Array ( [id] => 16873660 [patent_doc_number] => 20210167127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => CROSS-POINT MEMORY ARRAY AND RELATED FABRICATION TECHNIQUES [patent_app_type] => utility [patent_app_number] => 17/174027 [patent_app_country] => US [patent_app_date] => 2021-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 39144 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17174027 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/174027
Cross-point memory array and related fabrication techniques Feb 10, 2021 Issued
Array ( [id] => 16873660 [patent_doc_number] => 20210167127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => CROSS-POINT MEMORY ARRAY AND RELATED FABRICATION TECHNIQUES [patent_app_type] => utility [patent_app_number] => 17/174027 [patent_app_country] => US [patent_app_date] => 2021-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 39144 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17174027 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/174027
Cross-point memory array and related fabrication techniques Feb 10, 2021 Issued
Array ( [id] => 16873660 [patent_doc_number] => 20210167127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => CROSS-POINT MEMORY ARRAY AND RELATED FABRICATION TECHNIQUES [patent_app_type] => utility [patent_app_number] => 17/174027 [patent_app_country] => US [patent_app_date] => 2021-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 39144 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17174027 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/174027
Cross-point memory array and related fabrication techniques Feb 10, 2021 Issued
Array ( [id] => 18891077 [patent_doc_number] => 11869854 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-09 [patent_title] => Semiconductor structure formed with inductance elements [patent_app_type] => utility [patent_app_number] => 17/159181 [patent_app_country] => US [patent_app_date] => 2021-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4616 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 450 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17159181 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/159181
Semiconductor structure formed with inductance elements Jan 26, 2021 Issued
Array ( [id] => 18557073 [patent_doc_number] => 20230255092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => Display Substrate, Manufacturing Method of Same, and Display Apparatus [patent_app_type] => utility [patent_app_number] => 17/608985 [patent_app_country] => US [patent_app_date] => 2021-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8095 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17608985 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/608985
Display substrate, preparation method therefor, and display apparatus Jan 24, 2021 Issued
Array ( [id] => 17925892 [patent_doc_number] => 11469154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-11 [patent_title] => IGBT module with heat dissipation structure having specific layer thickness ratio [patent_app_type] => utility [patent_app_number] => 17/151203 [patent_app_country] => US [patent_app_date] => 2021-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2285 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17151203 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/151203
IGBT module with heat dissipation structure having specific layer thickness ratio Jan 16, 2021 Issued
Array ( [id] => 17825996 [patent_doc_number] => 11430953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-08-30 [patent_title] => Resistive random access memory device [patent_app_type] => utility [patent_app_number] => 17/140495 [patent_app_country] => US [patent_app_date] => 2021-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7442 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17140495 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/140495
Resistive random access memory device Jan 3, 2021 Issued
Array ( [id] => 18016335 [patent_doc_number] => 11508642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-22 [patent_title] => Power module package structure [patent_app_type] => utility [patent_app_number] => 17/137363 [patent_app_country] => US [patent_app_date] => 2020-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2727 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17137363 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/137363
Power module package structure Dec 29, 2020 Issued
Array ( [id] => 19110299 [patent_doc_number] => 11963434 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-16 [patent_title] => Flexible base substrate, display panel and display device [patent_app_type] => utility [patent_app_number] => 17/414461 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4684 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17414461 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/414461
Flexible base substrate, display panel and display device Dec 28, 2020 Issued
Array ( [id] => 17708627 [patent_doc_number] => 20220208635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-30 [patent_title] => SPACER WITH PATTERN LAYOUT FOR DUAL SIDE COOLING POWER MODULE [patent_app_type] => utility [patent_app_number] => 17/136286 [patent_app_country] => US [patent_app_date] => 2020-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9365 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17136286 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/136286
Spacer with pattern layout for dual side cooling power module Dec 28, 2020 Issued
Array ( [id] => 17692228 [patent_doc_number] => 20220199521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => HIGH ASPECT RATIO VIAS FOR INTEGRATED CIRCUITS [patent_app_type] => utility [patent_app_number] => 17/129971 [patent_app_country] => US [patent_app_date] => 2020-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6086 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17129971 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/129971
High aspect ratio vias for integrated circuits Dec 21, 2020 Issued
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