Search

Viren A. Thakur

Examiner (ID: 7657, Phone: (571)272-6694 , Office: P/1792 )

Most Active Art Unit
1792
Art Unit(s)
1794, 1792, 1782, 1761
Total Applications
1003
Issued Applications
117
Pending Applications
125
Abandoned Applications
778

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18177684 [patent_doc_number] => 20230038413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => SEMICONDUCTOR PACKAGE INCLUDING HEAT DISSIPATION STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/702440 [patent_app_country] => US [patent_app_date] => 2022-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17702440 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/702440
Semiconductor package including heat dissipation structure Mar 22, 2022 Issued
Array ( [id] => 18113091 [patent_doc_number] => 20230005971 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => IMAGE SENSOR AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/693069 [patent_app_country] => US [patent_app_date] => 2022-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9622 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17693069 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/693069
Image sensor and method of fabricating the same Mar 10, 2022 Issued
Array ( [id] => 17676734 [patent_doc_number] => 20220189901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => MULTI-SIDE POWER DELIVERY IN STACKED MEMORY PACKAGING [patent_app_type] => utility [patent_app_number] => 17/687220 [patent_app_country] => US [patent_app_date] => 2022-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6397 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17687220 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/687220
MULTI-SIDE POWER DELIVERY IN STACKED MEMORY PACKAGING Mar 3, 2022 Pending
Array ( [id] => 18585995 [patent_doc_number] => 20230268260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => PACKAGE STRUCTURE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/679052 [patent_app_country] => US [patent_app_date] => 2022-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9208 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17679052 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/679052
Package structure and method of fabricating the same Feb 22, 2022 Issued
Array ( [id] => 18219686 [patent_doc_number] => 11594636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-02-28 [patent_title] => Source/drain structure [patent_app_type] => utility [patent_app_number] => 17/651437 [patent_app_country] => US [patent_app_date] => 2022-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 20 [patent_no_of_words] => 11325 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17651437 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/651437
Source/drain structure Feb 16, 2022 Issued
Array ( [id] => 17780245 [patent_doc_number] => 20220246595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/591408 [patent_app_country] => US [patent_app_date] => 2022-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2485 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17591408 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/591408
Semiconductor device and a method of manufacturing a semiconductor device Feb 1, 2022 Issued
Array ( [id] => 18661328 [patent_doc_number] => 20230307341 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => PACKAGING ARCHITECTURE WITH EDGE RING ANCHORING [patent_app_type] => utility [patent_app_number] => 17/583485 [patent_app_country] => US [patent_app_date] => 2022-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17583485 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/583485
PACKAGING ARCHITECTURE WITH EDGE RING ANCHORING Jan 24, 2022 Pending
Array ( [id] => 18514648 [patent_doc_number] => 20230230908 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => PACKAGE COMPRISING A SUBSTRATE WITH POST INTERCONNECTS AND A SOLDER RESIST LAYER HAVING A CAVITY [patent_app_type] => utility [patent_app_number] => 17/579434 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16276 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17579434 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/579434
PACKAGE COMPRISING A SUBSTRATE WITH POST INTERCONNECTS AND A SOLDER RESIST LAYER HAVING A CAVITY Jan 18, 2022 Pending
Array ( [id] => 18874827 [patent_doc_number] => 11862650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Wave guide filter for semiconductor imaging devices [patent_app_type] => utility [patent_app_number] => 17/579030 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 24 [patent_no_of_words] => 10446 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17579030 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/579030
Wave guide filter for semiconductor imaging devices Jan 18, 2022 Issued
Array ( [id] => 18292504 [patent_doc_number] => 11621377 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-04 [patent_title] => LED and phosphor combinations for high luminous efficacy lighting with superior color control [patent_app_type] => utility [patent_app_number] => 17/576757 [patent_app_country] => US [patent_app_date] => 2022-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 45 [patent_no_of_words] => 5873 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17576757 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/576757
LED and phosphor combinations for high luminous efficacy lighting with superior color control Jan 13, 2022 Issued
Array ( [id] => 18160084 [patent_doc_number] => 20230026676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHOD OF FORMATION [patent_app_type] => utility [patent_app_number] => 17/570710 [patent_app_country] => US [patent_app_date] => 2022-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12103 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17570710 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/570710
SEMICONDUCTOR DEVICE STRUCTURE AND METHOD OF FORMATION Jan 6, 2022 Pending
Array ( [id] => 18440066 [patent_doc_number] => 20230187361 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => ELECTRONIC DEVICE HAVING SUBSTRATE [patent_app_type] => utility [patent_app_number] => 17/550474 [patent_app_country] => US [patent_app_date] => 2021-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5535 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17550474 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/550474
Electronic device having substrate Dec 13, 2021 Issued
Array ( [id] => 18440072 [patent_doc_number] => 20230187367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => ELECTRONIC PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/548328 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548328 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548328
ELECTRONIC PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME Dec 9, 2021 Pending
Array ( [id] => 17676711 [patent_doc_number] => 20220189878 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-16 [patent_title] => CHIP PACKAGING STRUCTURE AND METHOD FOR PREPARING SAME [patent_app_type] => utility [patent_app_number] => 17/548145 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4362 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548145 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548145
Chip packaging structure and method for preparing same Dec 9, 2021 Issued
Array ( [id] => 17486300 [patent_doc_number] => 20220093804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-24 [patent_title] => THIN FILM TRANSISTOR ARRAY PANEL [patent_app_type] => utility [patent_app_number] => 17/544353 [patent_app_country] => US [patent_app_date] => 2021-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11467 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17544353 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/544353
Thin film transistor array panel Dec 6, 2021 Issued
Array ( [id] => 18394953 [patent_doc_number] => 20230163174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => Shielding Structure for Silicon Carbide Devices [patent_app_type] => utility [patent_app_number] => 17/533513 [patent_app_country] => US [patent_app_date] => 2021-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6269 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17533513 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/533513
Shielding Structure for Silicon Carbide Devices Nov 22, 2021 Issued
Array ( [id] => 17599697 [patent_doc_number] => 20220149271 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-12 [patent_title] => MAGNETORESISTIVE DEVICES AND METHODS OF FABRICATING SUCH DEVICES [patent_app_type] => utility [patent_app_number] => 17/533395 [patent_app_country] => US [patent_app_date] => 2021-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17533395 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/533395
MAGNETORESISTIVE DEVICES AND METHODS OF FABRICATING SUCH DEVICES Nov 22, 2021 Pending
Array ( [id] => 20118407 [patent_doc_number] => 12368125 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Package with polymer pillars and raised portions [patent_app_type] => utility [patent_app_number] => 17/522717 [patent_app_country] => US [patent_app_date] => 2021-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 28 [patent_no_of_words] => 10145 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17522717 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/522717
Package with polymer pillars and raised portions Nov 8, 2021 Issued
Array ( [id] => 17886609 [patent_doc_number] => 20220302087 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/509610 [patent_app_country] => US [patent_app_date] => 2021-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8917 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17509610 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/509610
SEMICONDUCTOR PACKAGE Oct 24, 2021 Abandoned
Array ( [id] => 19330456 [patent_doc_number] => 12048156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Vertical memory devices and methods of manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/450726 [patent_app_country] => US [patent_app_date] => 2021-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 10369 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17450726 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/450726
Vertical memory devices and methods of manufacturing the same Oct 12, 2021 Issued
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