
Viren A. Thakur
Examiner (ID: 7657, Phone: (571)272-6694 , Office: P/1792 )
| Most Active Art Unit | 1792 |
| Art Unit(s) | 1794, 1792, 1782, 1761 |
| Total Applications | 1003 |
| Issued Applications | 117 |
| Pending Applications | 125 |
| Abandoned Applications | 778 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18209943
[patent_doc_number] => 20230056204
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-23
[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAME
[patent_app_type] => utility
[patent_app_number] => 17/441182
[patent_app_country] => US
[patent_app_date] => 2021-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5436
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17441182
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/441182 | SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING SAME | Jun 29, 2021 | Abandoned |
Array
(
[id] => 18097396
[patent_doc_number] => 20220415737
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-29
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/358001
[patent_app_country] => US
[patent_app_date] => 2021-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11322
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17358001
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/358001 | Semiconductor device and manufacturing method thereof | Jun 24, 2021 | Issued |
Array
(
[id] => 18767014
[patent_doc_number] => 11817426
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-11-14
[patent_title] => Package and method of fabricating the same
[patent_app_type] => utility
[patent_app_number] => 17/337594
[patent_app_country] => US
[patent_app_date] => 2021-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 42
[patent_figures_cnt] => 46
[patent_no_of_words] => 14278
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17337594
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/337594 | Package and method of fabricating the same | Jun 2, 2021 | Issued |
Array
(
[id] => 18857332
[patent_doc_number] => 11854927
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Semiconductor package and method of forming same
[patent_app_type] => utility
[patent_app_number] => 17/333399
[patent_app_country] => US
[patent_app_date] => 2021-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 22
[patent_no_of_words] => 11074
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17333399
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/333399 | Semiconductor package and method of forming same | May 27, 2021 | Issued |
Array
(
[id] => 17085556
[patent_doc_number] => 20210280563
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-09
[patent_title] => SEMICONDUCTOR DEVICE, FABRICATION METHOD THEREOF, PACKAGE AND FABRICATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/328154
[patent_app_country] => US
[patent_app_date] => 2021-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5412
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 47
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17328154
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/328154 | SEMICONDUCTOR DEVICE, FABRICATION METHOD THEREOF, PACKAGE AND FABRICATION METHOD THEREOF | May 23, 2021 | Abandoned |
Array
(
[id] => 18913065
[patent_doc_number] => 11876052
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-16
[patent_title] => Semiconductor die bonding structure
[patent_app_type] => utility
[patent_app_number] => 17/324973
[patent_app_country] => US
[patent_app_date] => 2021-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 31
[patent_no_of_words] => 9629
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 165
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17324973
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/324973 | Semiconductor die bonding structure | May 18, 2021 | Issued |
Array
(
[id] => 20404453
[patent_doc_number] => 12494434
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-12-09
[patent_title] => Semiconductor packages and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/320190
[patent_app_country] => US
[patent_app_date] => 2021-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 3233
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17320190
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/320190 | Semiconductor packages and method of manufacturing the same | May 12, 2021 | Issued |
Array
(
[id] => 17993518
[patent_doc_number] => 20220359555
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-10
[patent_title] => BONDED ASSEMBLY OF A MEMORY DIE AND A LOGIC DIE INCLUDING LATERALLY SHIFTED BIT-LINE BONDING PADS AND METHODS OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/315938
[patent_app_country] => US
[patent_app_date] => 2021-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9984
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 250
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315938
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/315938 | Bonded assembly of a memory die and a logic die including laterally shifted bit-line bonding pads and methods of forming the same | May 9, 2021 | Issued |
Array
(
[id] => 17738102
[patent_doc_number] => 20220223564
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-14
[patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 17/314713
[patent_app_country] => US
[patent_app_date] => 2021-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19041
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17314713
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/314713 | Semiconductor package and method of manufacturing semiconductor package | May 6, 2021 | Issued |
Array
(
[id] => 17993286
[patent_doc_number] => 20220359323
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-10
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 17/314071
[patent_app_country] => US
[patent_app_date] => 2021-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7615
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17314071
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/314071 | SEMICONDUCTOR PACKAGE | May 6, 2021 | Pending |
Array
(
[id] => 18424231
[patent_doc_number] => 20230178695
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-08
[patent_title] => RADIATION-EMITTING SEMICONDUCTOR COMPONENT AND METHOD FOR PRODUCING A RADIATION-EMITTING SEMICONDUCTOR COMPONENT
[patent_app_type] => utility
[patent_app_number] => 17/923772
[patent_app_country] => US
[patent_app_date] => 2021-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5347
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17923772
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/923772 | RADIATION-EMITTING SEMICONDUCTOR COMPONENT AND METHOD FOR PRODUCING A RADIATION-EMITTING SEMICONDUCTOR COMPONENT | May 4, 2021 | Abandoned |
Array
(
[id] => 17752789
[patent_doc_number] => 20220230994
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-07-21
[patent_title] => SEMICONDUCTOR PACKAGE INCLUDING VERTICAL INTERCONNECTOR
[patent_app_type] => utility
[patent_app_number] => 17/308718
[patent_app_country] => US
[patent_app_date] => 2021-05-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6860
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17308718
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/308718 | Semiconductor package including vertical interconnector | May 4, 2021 | Issued |
Array
(
[id] => 17463758
[patent_doc_number] => 20220077064
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-10
[patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/307037
[patent_app_country] => US
[patent_app_date] => 2021-05-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11012
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17307037
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/307037 | Semiconductor package and method of manufacturing the same | May 3, 2021 | Issued |
Array
(
[id] => 19627163
[patent_doc_number] => 12166012
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-10
[patent_title] => Flip-chip stacking structures and methods for forming the same
[patent_app_type] => utility
[patent_app_number] => 17/243687
[patent_app_country] => US
[patent_app_date] => 2021-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 7351
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 319
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17243687
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/243687 | Flip-chip stacking structures and methods for forming the same | Apr 28, 2021 | Issued |
Array
(
[id] => 19524080
[patent_doc_number] => 12125820
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-22
[patent_title] => Through-dielectric vias for direct connection and method forming same
[patent_app_type] => utility
[patent_app_number] => 17/229283
[patent_app_country] => US
[patent_app_date] => 2021-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 35
[patent_no_of_words] => 7768
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17229283
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/229283 | Through-dielectric vias for direct connection and method forming same | Apr 12, 2021 | Issued |
Array
(
[id] => 17971521
[patent_doc_number] => 11489072
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-01
[patent_title] => Mirror device structure for power MOSFET and method of manufacture
[patent_app_type] => utility
[patent_app_number] => 17/224171
[patent_app_country] => US
[patent_app_date] => 2021-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 6968
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17224171
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/224171 | Mirror device structure for power MOSFET and method of manufacture | Apr 6, 2021 | Issued |
Array
(
[id] => 17917624
[patent_doc_number] => 20220320020
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-06
[patent_title] => PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/218137
[patent_app_country] => US
[patent_app_date] => 2021-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9039
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17218137
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/218137 | Package structure and method of forming the same | Mar 29, 2021 | Issued |
Array
(
[id] => 18767012
[patent_doc_number] => 11817424
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-11-14
[patent_title] => Semiconductor package
[patent_app_type] => utility
[patent_app_number] => 17/212332
[patent_app_country] => US
[patent_app_date] => 2021-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 22
[patent_no_of_words] => 11840
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 292
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17212332
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/212332 | Semiconductor package | Mar 24, 2021 | Issued |
Array
(
[id] => 16951774
[patent_doc_number] => 20210210466
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-08
[patent_title] => SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND SEMICONDUCTOR PACKAGE STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/206257
[patent_app_country] => US
[patent_app_date] => 2021-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8520
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 186
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17206257
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/206257 | Semiconductor integrated circuit device and semiconductor package structure | Mar 18, 2021 | Issued |
Array
(
[id] => 20360217
[patent_doc_number] => 12476223
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-18
[patent_title] => Semiconductor package and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/206098
[patent_app_country] => US
[patent_app_date] => 2021-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 41
[patent_no_of_words] => 14562
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 226
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17206098
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/206098 | Semiconductor package and method of manufacturing the same | Mar 17, 2021 | Issued |