
Vit W. Miska
Examiner (ID: 5149, Phone: (571)272-2108 , Office: P/2833 )
| Most Active Art Unit | 2107 |
| Art Unit(s) | 2833, 2103, 2203, 2107, 2859, 3105, 2112, 2856, 2841, 2899 |
| Total Applications | 3372 |
| Issued Applications | 2863 |
| Pending Applications | 96 |
| Abandoned Applications | 416 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11718174
[patent_doc_number] => 20170186672
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-29
[patent_title] => 'ELECTRONIC ELEMENT MOUNTING SUBSTRATE AND ELECTRONIC DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/304889
[patent_app_country] => US
[patent_app_date] => 2015-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 9294
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15304889
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/304889 | Electronic element mounting substrate and electronic device | Apr 13, 2015 | Issued |
Array
(
[id] => 11221526
[patent_doc_number] => 09449868
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-09-20
[patent_title] => 'Methods of forming semiconductor diodes by aspect ratio trapping with coalesced films'
[patent_app_type] => utility
[patent_app_number] => 14/685399
[patent_app_country] => US
[patent_app_date] => 2015-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 32
[patent_no_of_words] => 11557
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14685399
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/685399 | Methods of forming semiconductor diodes by aspect ratio trapping with coalesced films | Apr 12, 2015 | Issued |
Array
(
[id] => 10667019
[patent_doc_number] => 20160013164
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-01-14
[patent_title] => 'LIGHT EMITTER DEVICES AND METHODS FOR LIGHT EMITTING DIODE (LED) CHIPS'
[patent_app_type] => utility
[patent_app_number] => 14/679948
[patent_app_country] => US
[patent_app_date] => 2015-04-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 22710
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14679948
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/679948 | LIGHT EMITTER DEVICES AND METHODS FOR LIGHT EMITTING DIODE (LED) CHIPS | Apr 5, 2015 | Abandoned |
Array
(
[id] => 11776115
[patent_doc_number] => 09385067
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-07-05
[patent_title] => 'Semiconductor device with through silicon via and alignment mark'
[patent_app_type] => utility
[patent_app_number] => 14/676934
[patent_app_country] => US
[patent_app_date] => 2015-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 22
[patent_no_of_words] => 5497
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14676934
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/676934 | Semiconductor device with through silicon via and alignment mark | Apr 1, 2015 | Issued |
Array
(
[id] => 10322037
[patent_doc_number] => 20150207040
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-23
[patent_title] => 'LIGHT EMITTING DEVICES FOR LIGHT EMITTING DIODES (LEDS)'
[patent_app_type] => utility
[patent_app_number] => 14/673263
[patent_app_country] => US
[patent_app_date] => 2015-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 18221
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14673263
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/673263 | LIGHT EMITTING DEVICES FOR LIGHT EMITTING DIODES (LEDS) | Mar 29, 2015 | Abandoned |
Array
(
[id] => 11710835
[patent_doc_number] => 20170179334
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-22
[patent_title] => 'ULTRAFAST LIGHT EMITTING DIODES FOR OPTICAL WIRELESS COMMUNICATIONS'
[patent_app_type] => utility
[patent_app_number] => 15/128723
[patent_app_country] => US
[patent_app_date] => 2015-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6351
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15128723
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/128723 | Ultrafast light emitting diodes for optical wireless communications | Mar 26, 2015 | Issued |
Array
(
[id] => 10302603
[patent_doc_number] => 20150187603
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-02
[patent_title] => 'FABRICATION METHOD OF PACKAGING SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 14/643444
[patent_app_country] => US
[patent_app_date] => 2015-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 3561
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14643444
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/643444 | Fabrication method of packaging substrate | Mar 9, 2015 | Issued |
Array
(
[id] => 10611162
[patent_doc_number] => 09331208
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-03
[patent_title] => 'Oxide semiconductor film and semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/635199
[patent_app_country] => US
[patent_app_date] => 2015-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 67
[patent_no_of_words] => 29862
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14635199
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/635199 | Oxide semiconductor film and semiconductor device | Mar 1, 2015 | Issued |
Array
(
[id] => 11201102
[patent_doc_number] => 09431323
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-08-30
[patent_title] => 'Conductive pad on protruding through electrode'
[patent_app_type] => utility
[patent_app_number] => 14/615127
[patent_app_country] => US
[patent_app_date] => 2015-02-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 27
[patent_no_of_words] => 6925
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14615127
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/615127 | Conductive pad on protruding through electrode | Feb 4, 2015 | Issued |
Array
(
[id] => 11781777
[patent_doc_number] => 09390976
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-07-12
[patent_title] => 'Method of forming epitaxial buffer layer for finFET source and drain junction leakage reduction'
[patent_app_type] => utility
[patent_app_number] => 14/610653
[patent_app_country] => US
[patent_app_date] => 2015-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6672
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14610653
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/610653 | Method of forming epitaxial buffer layer for finFET source and drain junction leakage reduction | Jan 29, 2015 | Issued |
Array
(
[id] => 10993130
[patent_doc_number] => 20160190077
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-06-30
[patent_title] => 'SEMICONDUCTOR STRUCTURE WITH UBM LAYER AND METHOD OF FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/609412
[patent_app_country] => US
[patent_app_date] => 2015-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4229
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14609412
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/609412 | Semiconductor structure with UBM layer and method of fabricating the same | Jan 28, 2015 | Issued |
Array
(
[id] => 10252217
[patent_doc_number] => 20150137213
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-21
[patent_title] => 'NONVOLATILE SEMICONDUCTOR STORAGE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/606267
[patent_app_country] => US
[patent_app_date] => 2015-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 12039
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14606267
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/606267 | Nonvolatile semiconductor storage device | Jan 26, 2015 | Issued |
Array
(
[id] => 10448216
[patent_doc_number] => 20150333230
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-11-19
[patent_title] => 'LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE PACKAGE INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/606499
[patent_app_country] => US
[patent_app_date] => 2015-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 26
[patent_no_of_words] => 17553
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14606499
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/606499 | Light emitting device and light emitting device package including the same | Jan 26, 2015 | Issued |
Array
(
[id] => 10433165
[patent_doc_number] => 20150318177
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-11-05
[patent_title] => 'LATERAL OXIDATION OF NFET HIGH-K GATE STACKS'
[patent_app_type] => utility
[patent_app_number] => 14/604916
[patent_app_country] => US
[patent_app_date] => 2015-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 5521
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14604916
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/604916 | Method of lateral oxidation of NFET and PFET high-K gate stacks | Jan 25, 2015 | Issued |
Array
(
[id] => 11346243
[patent_doc_number] => 09530659
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-12-27
[patent_title] => 'Structure for preventing buried oxide gouging during planar and FinFET Processing on SOI'
[patent_app_type] => utility
[patent_app_number] => 14/603624
[patent_app_country] => US
[patent_app_date] => 2015-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 5270
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14603624
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/603624 | Structure for preventing buried oxide gouging during planar and FinFET Processing on SOI | Jan 22, 2015 | Issued |
Array
(
[id] => 10309435
[patent_doc_number] => 20150194436
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-07-09
[patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF PRODUCING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/600554
[patent_app_country] => US
[patent_app_date] => 2015-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 61
[patent_figures_cnt] => 61
[patent_no_of_words] => 16302
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14600554
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/600554 | Semiconductor integrated circuit and method of producing the same | Jan 19, 2015 | Issued |
Array
(
[id] => 10184882
[patent_doc_number] => 09214566
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-15
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/594958
[patent_app_country] => US
[patent_app_date] => 2015-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 49
[patent_no_of_words] => 19884
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14594958
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/594958 | Semiconductor device | Jan 11, 2015 | Issued |
Array
(
[id] => 10047462
[patent_doc_number] => 09087868
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-07-21
[patent_title] => 'Bipolar junction transistors with self-aligned terminals'
[patent_app_type] => utility
[patent_app_number] => 14/593282
[patent_app_country] => US
[patent_app_date] => 2015-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7435
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14593282
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/593282 | Bipolar junction transistors with self-aligned terminals | Jan 8, 2015 | Issued |
Array
(
[id] => 10440640
[patent_doc_number] => 20150325652
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-11-12
[patent_title] => 'BODY CONTACT LAYOUTS FOR SEMICONDUCTOR STRUCTURES'
[patent_app_type] => utility
[patent_app_number] => 14/590645
[patent_app_country] => US
[patent_app_date] => 2015-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 9013
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14590645
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/590645 | Body contact layouts for semiconductor structures | Jan 5, 2015 | Issued |
Array
(
[id] => 11360256
[patent_doc_number] => 09536914
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-01-03
[patent_title] => 'Front side illuminated semiconductor structure with improved light absorption efficiency'
[patent_app_type] => utility
[patent_app_number] => 14/590270
[patent_app_country] => US
[patent_app_date] => 2015-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2882
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14590270
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/590270 | Front side illuminated semiconductor structure with improved light absorption efficiency | Jan 5, 2015 | Issued |