Search

Vu A. Vu

Examiner (ID: 13665)

Most Active Art Unit
2828
Art Unit(s)
2828, 2897, 2823
Total Applications
1445
Issued Applications
1233
Pending Applications
139
Abandoned Applications
98

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19130973 [patent_doc_number] => 20240136326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-25 [patent_title] => NO MOLD SHELF PACKAGE DESIGN AND PROCESS FLOW FOR ADVANCED PACKAGE ARCHITECTURES [patent_app_type] => utility [patent_app_number] => 18/399189 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399189 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/399189
Mold shelf package design and process flow for advanced package architectures Dec 27, 2023 Issued
Array ( [id] => 19502119 [patent_doc_number] => 20240341137 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/398732 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12100 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18398732 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/398732
DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME Dec 27, 2023 Pending
Array ( [id] => 19269698 [patent_doc_number] => 20240213403 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/397702 [patent_app_country] => US [patent_app_date] => 2023-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14135 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18397702 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/397702
SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME Dec 26, 2023 Pending
Array ( [id] => 19728628 [patent_doc_number] => 20250031379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => SEMICONDUCTOR DEVICE BASED ON DIELECTRIC MATERIAL CONTAINING METAL INTERSTITIAL IMPURITY [patent_app_type] => utility [patent_app_number] => 18/397387 [patent_app_country] => US [patent_app_date] => 2023-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7080 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18397387 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/397387
SEMICONDUCTOR DEVICE BASED ON DIELECTRIC MATERIAL CONTAINING METAL INTERSTITIAL IMPURITY Dec 26, 2023 Pending
Array ( [id] => 20074274 [patent_doc_number] => 20250212496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => ISOLATION FORMATION METHOD IN HIGH-ASPECT RATIO CMOS STACKED DEVICES [patent_app_type] => utility [patent_app_number] => 18/394352 [patent_app_country] => US [patent_app_date] => 2023-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1200 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18394352 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/394352
ISOLATION FORMATION METHOD IN HIGH-ASPECT RATIO CMOS STACKED DEVICES Dec 21, 2023 Pending
Array ( [id] => 19266642 [patent_doc_number] => 20240210343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-27 [patent_title] => NANOPORE SENSING DEVICE WITH MULTIPLE SENSING LAYERS [patent_app_type] => utility [patent_app_number] => 18/392429 [patent_app_country] => US [patent_app_date] => 2023-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8641 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18392429 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/392429
NANOPORE SENSING DEVICE WITH MULTIPLE SENSING LAYERS Dec 20, 2023 Pending
Array ( [id] => 19237415 [patent_doc_number] => 20240194610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/391075 [patent_app_country] => US [patent_app_date] => 2023-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7308 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18391075 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/391075
Semiconductor devices and methods of manufacturing semiconductor devices Dec 19, 2023 Issued
Array ( [id] => 19957392 [patent_doc_number] => 12327811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-10 [patent_title] => Ion implantation with annealing for substrate cutting [patent_app_type] => utility [patent_app_number] => 18/390439 [patent_app_country] => US [patent_app_date] => 2023-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 80 [patent_figures_cnt] => 118 [patent_no_of_words] => 12227 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18390439 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/390439
Ion implantation with annealing for substrate cutting Dec 19, 2023 Issued
Array ( [id] => 19161134 [patent_doc_number] => 20240153841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-09 [patent_title] => THERMALLY CONDUCTIVE WAFER LAYER [patent_app_type] => utility [patent_app_number] => 18/544590 [patent_app_country] => US [patent_app_date] => 2023-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3455 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18544590 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/544590
THERMALLY CONDUCTIVE WAFER LAYER Dec 18, 2023 Pending
Array ( [id] => 20063465 [patent_doc_number] => 20250201687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => SUBSTRATE STRUCTURE INCLUDING STACKED SUBSTRATES DISPOSED IN A SHELL [patent_app_type] => utility [patent_app_number] => 18/542052 [patent_app_country] => US [patent_app_date] => 2023-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2282 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542052 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/542052
SUBSTRATE STRUCTURE INCLUDING STACKED SUBSTRATES DISPOSED IN A SHELL Dec 14, 2023 Pending
Array ( [id] => 19881224 [patent_doc_number] => 20250113481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-03 [patent_title] => SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/542228 [patent_app_country] => US [patent_app_date] => 2023-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542228 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/542228
SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF Dec 14, 2023 Pending
Array ( [id] => 19468294 [patent_doc_number] => 20240321964 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => TRENCH SEMICONDUCTOR POWER DEVICE AND LAYOUT THEREOF [patent_app_type] => utility [patent_app_number] => 18/542211 [patent_app_country] => US [patent_app_date] => 2023-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4486 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542211 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/542211
TRENCH SEMICONDUCTOR POWER DEVICE AND LAYOUT THEREOF Dec 14, 2023 Pending
Array ( [id] => 19720408 [patent_doc_number] => 12205953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Semiconductor integrated circuit device [patent_app_type] => utility [patent_app_number] => 18/540220 [patent_app_country] => US [patent_app_date] => 2023-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 7226 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18540220 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/540220
Semiconductor integrated circuit device Dec 13, 2023 Issued
Array ( [id] => 20055960 [patent_doc_number] => 20250194182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => STACKED DEVICE STRUCTURES WITH VARYING LAYER CHARACTERISTICS [patent_app_type] => utility [patent_app_number] => 18/537444 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3190 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18537444 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/537444
STACKED DEVICE STRUCTURES WITH VARYING LAYER CHARACTERISTICS Dec 11, 2023 Pending
Array ( [id] => 19988720 [patent_doc_number] => 20250126942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-17 [patent_title] => MULTI-CHANNEL VISIBLE LIGHT COMMUNICATION SYSTEM [patent_app_type] => utility [patent_app_number] => 18/537778 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18537778 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/537778
MULTI-CHANNEL VISIBLE LIGHT COMMUNICATION SYSTEM Dec 11, 2023 Pending
Array ( [id] => 19670866 [patent_doc_number] => 12183636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Semiconductor substrate, method for manufacturing semiconductor substrate and method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 18/536188 [patent_app_country] => US [patent_app_date] => 2023-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4714 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18536188 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/536188
Semiconductor substrate, method for manufacturing semiconductor substrate and method for manufacturing semiconductor device Dec 10, 2023 Issued
Array ( [id] => 19345184 [patent_doc_number] => 20240254147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => ORGANIC ELECTROLUMINESCENT MATERIALS AND DEVICES [patent_app_type] => utility [patent_app_number] => 18/533194 [patent_app_country] => US [patent_app_date] => 2023-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19115 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18533194 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/533194
ORGANIC ELECTROLUMINESCENT MATERIALS AND DEVICES Dec 7, 2023 Pending
Array ( [id] => 19351443 [patent_doc_number] => 20240260407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => LIGHT EMITTING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/531903 [patent_app_country] => US [patent_app_date] => 2023-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8147 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531903 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/531903
LIGHT EMITTING DISPLAY DEVICE Dec 6, 2023 Pending
Array ( [id] => 20056020 [patent_doc_number] => 20250194242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => LATERAL PASSIVE DIODES CO-INTEGRATED WITH NANOSHEET TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 18/531038 [patent_app_country] => US [patent_app_date] => 2023-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6786 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531038 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/531038
LATERAL PASSIVE DIODES CO-INTEGRATED WITH NANOSHEET TECHNOLOGY Dec 5, 2023 Pending
Array ( [id] => 19308799 [patent_doc_number] => 20240237382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => LIGHT-EMITTING DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/528513 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16910 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18528513 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/528513
LIGHT-EMITTING DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME Dec 3, 2023 Pending
Menu