Search

Vu A. Vu

Examiner (ID: 13989)

Most Active Art Unit
2828
Art Unit(s)
2828, 2823, 2897
Total Applications
1424
Issued Applications
1220
Pending Applications
135
Abandoned Applications
97

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19720408 [patent_doc_number] => 12205953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-21 [patent_title] => Semiconductor integrated circuit device [patent_app_type] => utility [patent_app_number] => 18/540220 [patent_app_country] => US [patent_app_date] => 2023-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 7226 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18540220 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/540220
Semiconductor integrated circuit device Dec 13, 2023 Issued
Array ( [id] => 20055960 [patent_doc_number] => 20250194182 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => STACKED DEVICE STRUCTURES WITH VARYING LAYER CHARACTERISTICS [patent_app_type] => utility [patent_app_number] => 18/537444 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3190 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18537444 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/537444
STACKED DEVICE STRUCTURES WITH VARYING LAYER CHARACTERISTICS Dec 11, 2023 Pending
Array ( [id] => 19670866 [patent_doc_number] => 12183636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-31 [patent_title] => Semiconductor substrate, method for manufacturing semiconductor substrate and method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 18/536188 [patent_app_country] => US [patent_app_date] => 2023-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4714 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18536188 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/536188
Semiconductor substrate, method for manufacturing semiconductor substrate and method for manufacturing semiconductor device Dec 10, 2023 Issued
Array ( [id] => 19351443 [patent_doc_number] => 20240260407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => LIGHT EMITTING DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/531903 [patent_app_country] => US [patent_app_date] => 2023-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8147 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531903 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/531903
LIGHT EMITTING DISPLAY DEVICE Dec 6, 2023 Pending
Array ( [id] => 20056020 [patent_doc_number] => 20250194242 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => LATERAL PASSIVE DIODES CO-INTEGRATED WITH NANOSHEET TECHNOLOGY [patent_app_type] => utility [patent_app_number] => 18/531038 [patent_app_country] => US [patent_app_date] => 2023-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6786 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18531038 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/531038
LATERAL PASSIVE DIODES CO-INTEGRATED WITH NANOSHEET TECHNOLOGY Dec 5, 2023 Pending
Array ( [id] => 19308799 [patent_doc_number] => 20240237382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => LIGHT-EMITTING DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 18/528513 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16910 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18528513 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/528513
LIGHT-EMITTING DEVICE AND ELECTRONIC APPARATUS INCLUDING THE SAME Dec 3, 2023 Pending
Array ( [id] => 19436097 [patent_doc_number] => 20240304595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => SEMICONDUCTOR CHIP HAVING A FRICTION STRUCTURE, SEMICONDUCTOR PACKAGE INCLUDING THE SAME, AND METHOD FOR MANUFACTURING A SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/521965 [patent_app_country] => US [patent_app_date] => 2023-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18521965 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/521965
SEMICONDUCTOR CHIP HAVING A FRICTION STRUCTURE, SEMICONDUCTOR PACKAGE INCLUDING THE SAME, AND METHOD FOR MANUFACTURING A SEMICONDUCTOR PACKAGE Nov 27, 2023 Pending
Array ( [id] => 20028970 [patent_doc_number] => 20250167192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => INTEGRATED CIRCUIT DIE STACK WITH A BRIDGE DIE [patent_app_type] => utility [patent_app_number] => 18/518184 [patent_app_country] => US [patent_app_date] => 2023-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518184 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/518184
INTEGRATED CIRCUIT DIE STACK WITH A BRIDGE DIE Nov 21, 2023 Pending
Array ( [id] => 19842691 [patent_doc_number] => 12255091 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Semiconductor processing apparatus and method utilizing electrostatic discharge (ESD) prevention layer [patent_app_type] => utility [patent_app_number] => 18/516703 [patent_app_country] => US [patent_app_date] => 2023-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 13983 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18516703 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/516703
Semiconductor processing apparatus and method utilizing electrostatic discharge (ESD) prevention layer Nov 20, 2023 Issued
Array ( [id] => 19006442 [patent_doc_number] => 20240070513 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => METHOD FOR DETERMINING CROSSTALK OF QUANTUM BITS, QUANTUM CONTROL SYSTEM, AND QUANTUM COMPUTER [patent_app_type] => utility [patent_app_number] => 18/504593 [patent_app_country] => US [patent_app_date] => 2023-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18504593 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/504593
METHOD FOR DETERMINING CROSSTALK OF QUANTUM BITS, QUANTUM CONTROL SYSTEM, AND QUANTUM COMPUTER Nov 7, 2023 Pending
Array ( [id] => 19010173 [patent_doc_number] => 20240074244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => DISPLAY PANEL AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/387240 [patent_app_country] => US [patent_app_date] => 2023-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15361 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18387240 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/387240
DISPLAY PANEL AND DISPLAY DEVICE Nov 5, 2023 Pending
Array ( [id] => 18991177 [patent_doc_number] => 20240063146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => BARIUM TITANATE FILMS HAVING REDUCED INTERFACIAL STRAIN [patent_app_type] => utility [patent_app_number] => 18/500504 [patent_app_country] => US [patent_app_date] => 2023-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5183 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18500504 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/500504
BARIUM TITANATE FILMS HAVING REDUCED INTERFACIAL STRAIN Nov 1, 2023 Pending
Array ( [id] => 20004694 [patent_doc_number] => 20250142916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/498251 [patent_app_country] => US [patent_app_date] => 2023-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4603 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18498251 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/498251
SEMICONDUCTOR DEVICE Oct 30, 2023 Pending
Array ( [id] => 19993978 [patent_doc_number] => 20250132200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-24 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/381374 [patent_app_country] => US [patent_app_date] => 2023-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20523 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18381374 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/381374
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Oct 17, 2023 Pending
Array ( [id] => 19116672 [patent_doc_number] => 20240128422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => Display Module and Method for Manufacturing Display Module [patent_app_type] => utility [patent_app_number] => 18/380972 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4795 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18380972 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/380972
Display Module and Method for Manufacturing Display Module Oct 16, 2023 Pending
Array ( [id] => 19605020 [patent_doc_number] => 20240395900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING BACKSIDE SOURCE/DRAIN CONTACT STRUCTURE WITH CONTACT SPACER AND BACKSIDE GATE CONTACT STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/380951 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9052 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18380951 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/380951
SEMICONDUCTOR DEVICE INCLUDING BACKSIDE SOURCE/DRAIN CONTACT STRUCTURE WITH CONTACT SPACER AND BACKSIDE GATE CONTACT STRUCTURE Oct 16, 2023 Pending
Array ( [id] => 19575286 [patent_doc_number] => 20240379578 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-14 [patent_title] => SEMICONDUCTOR STRUCTURE, DICING METHOD THEREOF, AND MEMORY [patent_app_type] => utility [patent_app_number] => 18/381030 [patent_app_country] => US [patent_app_date] => 2023-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8824 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18381030 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/381030
SEMICONDUCTOR STRUCTURE, DICING METHOD THEREOF, AND MEMORY Oct 16, 2023 Pending
Array ( [id] => 19806173 [patent_doc_number] => 20250072098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => SOURCE/DRAIN ISOLATION OF TOP AND BOTTOM TIERS OF 3D FIELD-EFFECT TRANSISTORS [patent_app_type] => utility [patent_app_number] => 18/486884 [patent_app_country] => US [patent_app_date] => 2023-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2400 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18486884 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/486884
SOURCE/DRAIN ISOLATION OF TOP AND BOTTOM TIERS OF 3D FIELD-EFFECT TRANSISTORS Oct 12, 2023 Pending
Array ( [id] => 19654439 [patent_doc_number] => 12176239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Parallel assembly of discrete components onto a substrate [patent_app_type] => utility [patent_app_number] => 18/478597 [patent_app_country] => US [patent_app_date] => 2023-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 12414 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18478597 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/478597
Parallel assembly of discrete components onto a substrate Sep 28, 2023 Issued
Array ( [id] => 18906027 [patent_doc_number] => 20240021512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-18 [patent_title] => DIE PACKAGE AND METHOD OF FORMING A DIE PACKAGE [patent_app_type] => utility [patent_app_number] => 18/374107 [patent_app_country] => US [patent_app_date] => 2023-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8104 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18374107 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/374107
Die package and method of forming a die package Sep 27, 2023 Issued
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