
Vu A. Vu
Examiner (ID: 11603)
| Most Active Art Unit | 2828 |
| Art Unit(s) | 2823, 2897, 2828 |
| Total Applications | 1405 |
| Issued Applications | 1214 |
| Pending Applications | 128 |
| Abandoned Applications | 96 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 58130
[patent_doc_number] => 07774583
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2010-08-10
[patent_title] => 'Processing bypass register file system and method'
[patent_app_type] => utility
[patent_app_number] => 11/540766
[patent_app_country] => US
[patent_app_date] => 2006-09-29
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 2619
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[pdf_file] => patents/07/774/07774583.pdf
[firstpage_image] =>[orig_patent_app_number] => 11540766
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/540766 | Processing bypass register file system and method | Sep 28, 2006 | Issued |
Array
(
[id] => 4942390
[patent_doc_number] => 20080079713
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-04-03
[patent_title] => 'Area Optimized Full Vector Width Vector Cross Product'
[patent_app_type] => utility
[patent_app_number] => 11/536156
[patent_app_country] => US
[patent_app_date] => 2006-09-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[pdf_file] => publications/A1/0079/20080079713.pdf
[firstpage_image] =>[orig_patent_app_number] => 11536156
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/536156 | Area Optimized Full Vector Width Vector Cross Product | Sep 27, 2006 | Abandoned |
Array
(
[id] => 5024743
[patent_doc_number] => 20070150710
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-06-28
[patent_title] => 'Apparatus and method for optimizing loop buffer in reconfigurable processor'
[patent_app_type] => utility
[patent_app_number] => 11/525913
[patent_app_country] => US
[patent_app_date] => 2006-09-25
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[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 4218
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[pdf_file] => publications/A1/0150/20070150710.pdf
[firstpage_image] =>[orig_patent_app_number] => 11525913
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/525913 | Apparatus and method for optimizing loop buffer in reconfigurable processor | Sep 24, 2006 | Issued |
Array
(
[id] => 175591
[patent_doc_number] => 07660974
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-02-09
[patent_title] => 'Method and apparatus for analyzing performance, and computer product'
[patent_app_type] => utility
[patent_app_number] => 11/524398
[patent_app_country] => US
[patent_app_date] => 2006-09-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => patents/07/660/07660974.pdf
[firstpage_image] =>[orig_patent_app_number] => 11524398
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/524398 | Method and apparatus for analyzing performance, and computer product | Sep 20, 2006 | Issued |
Array
(
[id] => 5195300
[patent_doc_number] => 20070083785
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-12
[patent_title] => 'System with high power and low power processors and thread transfer'
[patent_app_type] => utility
[patent_app_number] => 11/523996
[patent_app_country] => US
[patent_app_date] => 2006-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 48
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[firstpage_image] =>[orig_patent_app_number] => 11523996
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/523996 | System with high power and low power processors and thread transfer | Sep 19, 2006 | Abandoned |
Array
(
[id] => 5195199
[patent_doc_number] => 20070083684
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-12
[patent_title] => 'Data stream converter and data conversion circuit'
[patent_app_type] => utility
[patent_app_number] => 11/524365
[patent_app_country] => US
[patent_app_date] => 2006-09-20
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 11524365
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/524365 | Data stream converter and data conversion circuit | Sep 19, 2006 | Abandoned |
Array
(
[id] => 600324
[patent_doc_number] => 07437534
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-10-14
[patent_title] => 'Local and global register partitioning technique'
[patent_app_type] => utility
[patent_app_number] => 11/533314
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[patent_app_date] => 2006-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/437/07437534.pdf
[firstpage_image] =>[orig_patent_app_number] => 11533314
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/533314 | Local and global register partitioning technique | Sep 18, 2006 | Issued |
Array
(
[id] => 4923693
[patent_doc_number] => 20080072010
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-20
[patent_title] => 'Data processor and methods thereof'
[patent_app_type] => utility
[patent_app_number] => 11/522634
[patent_app_country] => US
[patent_app_date] => 2006-09-18
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0072/20080072010.pdf
[firstpage_image] =>[orig_patent_app_number] => 11522634
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/522634 | Data processor and methods thereof | Sep 17, 2006 | Issued |
Array
(
[id] => 4923698
[patent_doc_number] => 20080072015
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-20
[patent_title] => 'Demand-based processing resource allocation'
[patent_app_type] => utility
[patent_app_number] => 11/523132
[patent_app_country] => US
[patent_app_date] => 2006-09-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => publications/A1/0072/20080072015.pdf
[firstpage_image] =>[orig_patent_app_number] => 11523132
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/523132 | Demand-based processing resource allocation | Sep 17, 2006 | Abandoned |
Array
(
[id] => 5195285
[patent_doc_number] => 20070083770
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-04-12
[patent_title] => 'System and method for foiling code-injection attacks in a computing device'
[patent_app_type] => utility
[patent_app_number] => 11/521866
[patent_app_country] => US
[patent_app_date] => 2006-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[pdf_file] => publications/A1/0083/20070083770.pdf
[firstpage_image] =>[orig_patent_app_number] => 11521866
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/521866 | System and method for foiling code-injection attacks in a computing device | Sep 14, 2006 | Abandoned |
Array
(
[id] => 604879
[patent_doc_number] => 07434039
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-10-07
[patent_title] => 'Computer processor capable of responding with comparable efficiency to both software-state-independent and state-dependent events'
[patent_app_type] => utility
[patent_app_number] => 11/470728
[patent_app_country] => US
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[pdf_file] => patents/07/434/07434039.pdf
[firstpage_image] =>[orig_patent_app_number] => 11470728
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/470728 | Computer processor capable of responding with comparable efficiency to both software-state-independent and state-dependent events | Sep 6, 2006 | Issued |
Array
(
[id] => 6408724
[patent_doc_number] => 20100305937
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-02
[patent_title] => 'COPROCESSOR SUPPORT IN A COMPUTING DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/063262 | COPROCESSOR SUPPORT IN A COMPUTING DEVICE | Aug 7, 2006 | Abandoned |
Array
(
[id] => 106836
[patent_doc_number] => 07730285
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[patent_issue_date] => 2010-06-01
[patent_title] => 'Data processing system with partial bypass reorder buffer and combined load/store arithmetic logic unit and processing method thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/497805 | Data processing system with partial bypass reorder buffer and combined load/store arithmetic logic unit and processing method thereof | Aug 1, 2006 | Issued |
Array
(
[id] => 4829978
[patent_doc_number] => 20080126771
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[patent_kind] => A1
[patent_issue_date] => 2008-05-29
[patent_title] => 'Branch Target Extension for an Instruction Cache'
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[firstpage_image] =>[orig_patent_app_number] => 11459683
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/459683 | Branch Target Extension for an Instruction Cache | Jul 24, 2006 | Abandoned |
Array
(
[id] => 868798
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[patent_issue_date] => 2008-05-06
[patent_title] => 'Method for latest producer tracking in an out-of-order processor, and applications thereof'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/485959 | Method for latest producer tracking in an out-of-order processor, and applications thereof | Jul 13, 2006 | Issued |
Array
(
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[patent_doc_number] => 20060253686
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[patent_issue_date] => 2006-11-09
[patent_title] => 'Instruction prefetch apparatus and instruction prefetch method'
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[firstpage_image] =>[orig_patent_app_number] => 11484601
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/484601 | Instruction prefetch apparatus and instruction prefetch method | Jul 11, 2006 | Abandoned |
Array
(
[id] => 885607
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[patent_issue_date] => 2008-04-08
[patent_title] => 'Data processor'
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Array
(
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Array
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Array
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[patent_title] => 'Data processing systems and methods of operating the same in which memory blocks are selectively activated in fetching program instructions'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/476532 | Data processing systems and methods of operating the same in which memory blocks are selectively activated in fetching program instructions | Jun 27, 2006 | Abandoned |