
Vu A. Vu
Examiner (ID: 13665)
| Most Active Art Unit | 2828 |
| Art Unit(s) | 2828, 2897, 2823 |
| Total Applications | 1445 |
| Issued Applications | 1233 |
| Pending Applications | 139 |
| Abandoned Applications | 98 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19468024
[patent_doc_number] => 20240321694
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-26
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/186202
[patent_app_country] => US
[patent_app_date] => 2023-03-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6947
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18186202
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/186202 | Semiconductor device and method of forming the same | Mar 19, 2023 | Issued |
Array
(
[id] => 19452861
[patent_doc_number] => 20240312991
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-19
[patent_title] => FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING TUNED UPPER NANOWIRES
[patent_app_type] => utility
[patent_app_number] => 18/121720
[patent_app_country] => US
[patent_app_date] => 2023-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 17546
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 103
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18121720
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/121720 | FABRICATION OF GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING TUNED UPPER NANOWIRES | Mar 14, 2023 | Pending |
Array
(
[id] => 18485888
[patent_doc_number] => 20230213228
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-06
[patent_title] => SYSTEM FOR PLOT-BASED BUILDING SEASONAL FUEL CONSUMPTION FORECASTING WITH THE AID OF A DIGITAL COMPUTER
[patent_app_type] => utility
[patent_app_number] => 18/181960
[patent_app_country] => US
[patent_app_date] => 2023-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11594
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18181960
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/181960 | System for plot-based building seasonal fuel consumption forecasting with the aid of a digital computer | Mar 9, 2023 | Issued |
Array
(
[id] => 18848933
[patent_doc_number] => 20230411337
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-21
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/177739
[patent_app_country] => US
[patent_app_date] => 2023-03-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5194
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18177739
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/177739 | Semiconductor device and method for manufacturing semiconductor device | Mar 1, 2023 | Issued |
Array
(
[id] => 18473278
[patent_doc_number] => 20230207566
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-29
[patent_title] => CONNECTIONS FROM BURIED INTERCONNECTS TO DEVICE TERMINALS IN MULTIPLE STACKED DEVICES STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 18/176736
[patent_app_country] => US
[patent_app_date] => 2023-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7387
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18176736
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/176736 | CONNECTIONS FROM BURIED INTERCONNECTS TO DEVICE TERMINALS IN MULTIPLE STACKED DEVICES STRUCTURES | Feb 28, 2023 | Pending |
Array
(
[id] => 18943574
[patent_doc_number] => 20240038713
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-01
[patent_title] => SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/177072
[patent_app_country] => US
[patent_app_date] => 2023-03-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6470
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18177072
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/177072 | Semiconductor chip and semiconductor device | Feb 28, 2023 | Issued |
Array
(
[id] => 18615751
[patent_doc_number] => 20230282490
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-07
[patent_title] => CARRIER PLATE FOR PREPARING PACKAGE SUBSTRATE, PACKAGE SUBSTRATE STRUCTURE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/115043
[patent_app_country] => US
[patent_app_date] => 2023-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4463
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18115043
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/115043 | Carrier plate for preparing package substrate, package substrate structure and manufacturing method thereof | Feb 27, 2023 | Issued |
Array
(
[id] => 18473103
[patent_doc_number] => 20230207391
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-29
[patent_title] => METHOD FOR PRODUCING SEMICONDUCTOR DEVICE, SEMICONDUCTOR PACKAGE, AND METHOD FOR PRODUCING SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 18/176143
[patent_app_country] => US
[patent_app_date] => 2023-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5554
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18176143
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/176143 | Method for producing semiconductor device, semiconductor package, and method for producing semiconductor package | Feb 27, 2023 | Issued |
Array
(
[id] => 19023309
[patent_doc_number] => 20240079480
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-07
[patent_title] => SEMICONDUCTOR MODULE
[patent_app_type] => utility
[patent_app_number] => 18/174866
[patent_app_country] => US
[patent_app_date] => 2023-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9486
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18174866
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/174866 | Semiconductor module | Feb 26, 2023 | Issued |
Array
(
[id] => 19007952
[patent_doc_number] => 20240072023
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => WAFER LEVEL PACKAGING PROCESS FOR THIN FILM INDUCTORS
[patent_app_type] => utility
[patent_app_number] => 18/172975
[patent_app_country] => US
[patent_app_date] => 2023-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6939
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18172975
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/172975 | Wafer level packaging process for thin film inductors | Feb 21, 2023 | Issued |
Array
(
[id] => 19394791
[patent_doc_number] => 20240284661
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-22
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/171662
[patent_app_country] => US
[patent_app_date] => 2023-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4226
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18171662
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/171662 | Semiconductor device and manufacturing method thereof | Feb 20, 2023 | Issued |
Array
(
[id] => 18456205
[patent_doc_number] => 20230197487
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-22
[patent_title] => WAFER SUPPORTING MECHANISM AND METHOD FOR WAFER DICING
[patent_app_type] => utility
[patent_app_number] => 18/112466
[patent_app_country] => US
[patent_app_date] => 2023-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8235
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18112466
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/112466 | Wafer supporting mechanism and method for wafer dicing | Feb 20, 2023 | Issued |
Array
(
[id] => 18570482
[patent_doc_number] => 20230260819
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-17
[patent_title] => FILM FRAME CARRIER FOR A CURVED WAFER STAGE
[patent_app_type] => utility
[patent_app_number] => 18/169625
[patent_app_country] => US
[patent_app_date] => 2023-02-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8260
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18169625
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/169625 | Film frame carrier for a curved wafer stage | Feb 14, 2023 | Issued |
Array
(
[id] => 18456208
[patent_doc_number] => 20230197490
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-22
[patent_title] => MEMBRANE DIFFUSER FOR A SUBSTRATE CONTAINER
[patent_app_type] => utility
[patent_app_number] => 18/109756
[patent_app_country] => US
[patent_app_date] => 2023-02-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8555
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18109756
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/109756 | Membrane diffuser for a substrate container | Feb 13, 2023 | Issued |
Array
(
[id] => 20259019
[patent_doc_number] => 12431382
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-09-30
[patent_title] => Integrated wafer debonding and cleaning apparatus and debonding and cleaning method
[patent_app_type] => utility
[patent_app_number] => 18/104982
[patent_app_country] => US
[patent_app_date] => 2023-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 0
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18104982
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/104982 | Integrated wafer debonding and cleaning apparatus and debonding and cleaning method | Feb 1, 2023 | Issued |
Array
(
[id] => 18983553
[patent_doc_number] => 11908741
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2024-02-20
[patent_title] => Protective coating for plasma dicing
[patent_app_type] => utility
[patent_app_number] => 18/101072
[patent_app_country] => US
[patent_app_date] => 2023-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 4004
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 145
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18101072
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/101072 | Protective coating for plasma dicing | Jan 23, 2023 | Issued |
Array
(
[id] => 19079498
[patent_doc_number] => 11948876
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-02
[patent_title] => Package structure with through vias
[patent_app_type] => utility
[patent_app_number] => 18/157509
[patent_app_country] => US
[patent_app_date] => 2023-01-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 6090
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18157509
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/157509 | Package structure with through vias | Jan 19, 2023 | Issued |
Array
(
[id] => 18682424
[patent_doc_number] => 20230320101
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-05
[patent_title] => SEMICONDUCTOR MEMORY DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/153630
[patent_app_country] => US
[patent_app_date] => 2023-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12399
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18153630
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/153630 | Semiconductor memory device and electronic system including the same | Jan 11, 2023 | Issued |
Array
(
[id] => 18379769
[patent_doc_number] => 20230154858
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-18
[patent_title] => SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 18/096406
[patent_app_country] => US
[patent_app_date] => 2023-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13044
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18096406
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/096406 | Semiconductor devices and methods of manufacturing semiconductor devices | Jan 11, 2023 | Issued |
Array
(
[id] => 20553194
[patent_doc_number] => 12564008
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-02-24
[patent_title] => Method and treatment system for uniform processing of semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 18/152340
[patent_app_country] => US
[patent_app_date] => 2023-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 4764
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18152340
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/152340 | Method and treatment system for uniform processing of semiconductor devices | Jan 9, 2023 | Issued |