Search

Vu Anh Le

Examiner (ID: 16142, Phone: (571)272-1871 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
2825, 2824, 2818, 0, 2511
Total Applications
2999
Issued Applications
2864
Pending Applications
54
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19123370 [patent_doc_number] => 11967364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Variable width memory module supporting enhanced error detection and correction [patent_app_type] => utility [patent_app_number] => 18/203511 [patent_app_country] => US [patent_app_date] => 2023-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 7661 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18203511 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/203511
Variable width memory module supporting enhanced error detection and correction May 29, 2023 Issued
Array ( [id] => 18631488 [patent_doc_number] => 20230290390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-14 [patent_title] => SEMICONDUCTOR STORAGE DEVICE AND METHOD OF CONTROLLING THE SAME [patent_app_type] => utility [patent_app_number] => 18/316277 [patent_app_country] => US [patent_app_date] => 2023-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13977 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18316277 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/316277
Semiconductor storage device and method of controlling the same May 11, 2023 Issued
Array ( [id] => 19183581 [patent_doc_number] => 11990177 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-21 [patent_title] => Multi-die memory device [patent_app_type] => utility [patent_app_number] => 18/195877 [patent_app_country] => US [patent_app_date] => 2023-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 35 [patent_no_of_words] => 17659 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18195877 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/195877
Multi-die memory device May 9, 2023 Issued
Array ( [id] => 19314195 [patent_doc_number] => 12040019 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Methods for enlarging the memory window and improving data retention in resistive memory device [patent_app_type] => utility [patent_app_number] => 18/312635 [patent_app_country] => US [patent_app_date] => 2023-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 11425 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18312635 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/312635
Methods for enlarging the memory window and improving data retention in resistive memory device May 4, 2023 Issued
Array ( [id] => 18918289 [patent_doc_number] => 11880569 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-23 [patent_title] => Clock mode determination in a memory system [patent_app_type] => utility [patent_app_number] => 18/303127 [patent_app_country] => US [patent_app_date] => 2023-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 14241 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18303127 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/303127
Clock mode determination in a memory system Apr 18, 2023 Issued
Array ( [id] => 19229388 [patent_doc_number] => 12009029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-11 [patent_title] => System and method applied with computing-in-memory [patent_app_type] => utility [patent_app_number] => 18/185312 [patent_app_country] => US [patent_app_date] => 2023-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 15 [patent_no_of_words] => 12200 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18185312 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/185312
System and method applied with computing-in-memory Mar 15, 2023 Issued
Array ( [id] => 18472739 [patent_doc_number] => 20230207027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-29 [patent_title] => METHOD AND MEMORY USED FOR REDUCING PROGRAM DISTURBANCE BY ADJUSTING VOLTAGE OF DUMMY WORD LINE [patent_app_type] => utility [patent_app_number] => 18/118565 [patent_app_country] => US [patent_app_date] => 2023-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4260 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18118565 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/118565
Method and memory used for reducing program disturbance by adjusting voltage of dummy word line Mar 6, 2023 Issued
Array ( [id] => 19062901 [patent_doc_number] => 11942146 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-26 [patent_title] => Methods of controlling PCRAM devices in single-level-cell (SLC) and multi-level-cell (MLC) modes and a controller for performing the same methods [patent_app_type] => utility [patent_app_number] => 18/109184 [patent_app_country] => US [patent_app_date] => 2023-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 25642 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18109184 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/109184
Methods of controlling PCRAM devices in single-level-cell (SLC) and multi-level-cell (MLC) modes and a controller for performing the same methods Feb 12, 2023 Issued
Array ( [id] => 18857026 [patent_doc_number] => 11854617 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-26 [patent_title] => Structure for multiple sense amplifiers of memory device [patent_app_type] => utility [patent_app_number] => 18/156707 [patent_app_country] => US [patent_app_date] => 2023-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7667 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18156707 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/156707
Structure for multiple sense amplifiers of memory device Jan 18, 2023 Issued
Array ( [id] => 18378506 [patent_doc_number] => 20230153594 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => ARTIFICIAL NEURAL NETWORK CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/094351 [patent_app_country] => US [patent_app_date] => 2023-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4249 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18094351 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/094351
Artificial neural network circuit Jan 6, 2023 Issued
Array ( [id] => 18226110 [patent_doc_number] => 20230065104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => HYBRID SELF-TRACKING REFERENCE CIRCUIT FOR RRAM CELLS [patent_app_type] => utility [patent_app_number] => 17/981977 [patent_app_country] => US [patent_app_date] => 2022-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5683 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17981977 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/981977
Hybrid self-tracking reference circuit for RRAM cells Nov 6, 2022 Issued
Array ( [id] => 18307870 [patent_doc_number] => 20230111770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => ELECTRICAL DISTANCE-BASED WAVE SHAPING FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/046393 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7834 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18046393 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/046393
Electrical distance-based wave shaping for a memory device Oct 12, 2022 Issued
Array ( [id] => 18166015 [patent_doc_number] => 20230032616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => VARIABLE RESISTANCE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/961433 [patent_app_country] => US [patent_app_date] => 2022-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21741 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17961433 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/961433
Variable resistance memory device Oct 5, 2022 Issued
Array ( [id] => 18839972 [patent_doc_number] => 11848051 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-19 [patent_title] => Parallel drift cancellation [patent_app_type] => utility [patent_app_number] => 17/950630 [patent_app_country] => US [patent_app_date] => 2022-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 17659 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17950630 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/950630
Parallel drift cancellation Sep 21, 2022 Issued
Array ( [id] => 18145470 [patent_doc_number] => 20230019326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-19 [patent_title] => VOLTAGE-MODE BIT LINE PRECHARGE FOR RANDOM-ACCESS MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 17/945676 [patent_app_country] => US [patent_app_date] => 2022-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4205 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17945676 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/945676
Voltage-mode bit line precharge for random-access memory cells Sep 14, 2022 Issued
Array ( [id] => 18639271 [patent_doc_number] => 11763887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Cleaning memory blocks using multiple types of write operations [patent_app_type] => utility [patent_app_number] => 17/940744 [patent_app_country] => US [patent_app_date] => 2022-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 23129 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17940744 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/940744
Cleaning memory blocks using multiple types of write operations Sep 7, 2022 Issued
Array ( [id] => 18024020 [patent_doc_number] => 20220375519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => ADAPTIVE MEMORY MANAGEMENT AND CONTROL CIRCUITRY [patent_app_type] => utility [patent_app_number] => 17/881202 [patent_app_country] => US [patent_app_date] => 2022-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11314 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17881202 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/881202
Adaptive memory management and control circuitry Aug 3, 2022 Issued
Array ( [id] => 18097051 [patent_doc_number] => 20220415392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => DECODING FOR A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/874965 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874965 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/874965
Decoding for a memory device Jul 26, 2022 Issued
Array ( [id] => 18520635 [patent_doc_number] => 11710529 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Three-dimensional memory device programming with reduced disturbance [patent_app_type] => utility [patent_app_number] => 17/871472 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 13394 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17871472 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/871472
Three-dimensional memory device programming with reduced disturbance Jul 21, 2022 Issued
Array ( [id] => 18097054 [patent_doc_number] => 20220415395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => REFRESH OPERATION OF A MEMORY CELL [patent_app_type] => utility [patent_app_number] => 17/865248 [patent_app_country] => US [patent_app_date] => 2022-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13132 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17865248 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/865248
Refresh operation of a memory cell Jul 13, 2022 Issued
Menu