Search

Vu Anh Le

Examiner (ID: 15321, Phone: (571)272-1871 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2825, 0, 2824, 2511
Total Applications
2999
Issued Applications
2864
Pending Applications
54
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6126540 [patent_doc_number] => 20020075740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'SYSTEM FOR MEASURING ACCESS TIME OF EMBEDDED MEMORIES' [patent_app_type] => new [patent_app_number] => 09/726729 [patent_app_country] => US [patent_app_date] => 2000-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5042 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20020075740.pdf [firstpage_image] =>[orig_patent_app_number] => 09726729 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/726729
System and measuring access time of embedded memories Nov 29, 2000 Issued
Array ( [id] => 1536816 [patent_doc_number] => 06411538 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-25 [patent_title] => 'Compact load-less static ternary CAM' [patent_app_type] => B1 [patent_app_number] => 09/727527 [patent_app_country] => US [patent_app_date] => 2000-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/411/06411538.pdf [firstpage_image] =>[orig_patent_app_number] => 09727527 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/727527
Compact load-less static ternary CAM Nov 27, 2000 Issued
Array ( [id] => 1582588 [patent_doc_number] => 06449214 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Statistics counter overflow content addressable memory (CAM) and method' [patent_app_type] => B1 [patent_app_number] => 09/727533 [patent_app_country] => US [patent_app_date] => 2000-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2547 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/449/06449214.pdf [firstpage_image] =>[orig_patent_app_number] => 09727533 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/727533
Statistics counter overflow content addressable memory (CAM) and method Nov 27, 2000 Issued
Array ( [id] => 1145342 [patent_doc_number] => 06781895 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-24 [patent_title] => 'Non-volatile semiconductor memory device and memory system using the same' [patent_app_type] => B1 [patent_app_number] => 09/722474 [patent_app_country] => US [patent_app_date] => 2000-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 99 [patent_figures_cnt] => 153 [patent_no_of_words] => 29371 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/781/06781895.pdf [firstpage_image] =>[orig_patent_app_number] => 09722474 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/722474
Non-volatile semiconductor memory device and memory system using the same Nov 27, 2000 Issued
Array ( [id] => 1463730 [patent_doc_number] => 06392929 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Method of programming a flash memory cell' [patent_app_type] => B1 [patent_app_number] => 09/721935 [patent_app_country] => US [patent_app_date] => 2000-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 1540 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/392/06392929.pdf [firstpage_image] =>[orig_patent_app_number] => 09721935 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/721935
Method of programming a flash memory cell Nov 26, 2000 Issued
Array ( [id] => 4380802 [patent_doc_number] => 06275414 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-14 [patent_title] => 'Uniform bitline strapping of a non-volatile memory cell' [patent_app_type] => 1 [patent_app_number] => 9/721035 [patent_app_country] => US [patent_app_date] => 2000-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 2723 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/275/06275414.pdf [firstpage_image] =>[orig_patent_app_number] => 721035 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/721035
Uniform bitline strapping of a non-volatile memory cell Nov 21, 2000 Issued
Array ( [id] => 1536854 [patent_doc_number] => 06411545 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-25 [patent_title] => 'Non-volatile latch' [patent_app_type] => B1 [patent_app_number] => 09/713635 [patent_app_country] => US [patent_app_date] => 2000-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5178 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/411/06411545.pdf [firstpage_image] =>[orig_patent_app_number] => 09713635 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/713635
Non-volatile latch Nov 13, 2000 Issued
Array ( [id] => 1565063 [patent_doc_number] => 06362993 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Content addressable memory device' [patent_app_type] => B1 [patent_app_number] => 09/711989 [patent_app_country] => US [patent_app_date] => 2000-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 10714 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/362/06362993.pdf [firstpage_image] =>[orig_patent_app_number] => 09711989 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/711989
Content addressable memory device Nov 12, 2000 Issued
Array ( [id] => 4286749 [patent_doc_number] => 06324100 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-27 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/708471 [patent_app_country] => US [patent_app_date] => 2000-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 4732 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/324/06324100.pdf [firstpage_image] =>[orig_patent_app_number] => 708471 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/708471
Nonvolatile semiconductor memory device Nov 8, 2000 Issued
Array ( [id] => 4298436 [patent_doc_number] => 06269023 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Method of programming a non-volatile memory cell using a current limiter' [patent_app_type] => 1 [patent_app_number] => 9/694729 [patent_app_country] => US [patent_app_date] => 2000-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 9198 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/269/06269023.pdf [firstpage_image] =>[orig_patent_app_number] => 694729 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/694729
Method of programming a non-volatile memory cell using a current limiter Oct 22, 2000 Issued
Array ( [id] => 1480100 [patent_doc_number] => 06344999 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-05 [patent_title] => 'Non-volatile semiconductor memory device and data programming method' [patent_app_type] => B1 [patent_app_number] => 09/677902 [patent_app_country] => US [patent_app_date] => 2000-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 52 [patent_no_of_words] => 25004 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 348 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/344/06344999.pdf [firstpage_image] =>[orig_patent_app_number] => 09677902 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/677902
Non-volatile semiconductor memory device and data programming method Oct 2, 2000 Issued
Array ( [id] => 4298491 [patent_doc_number] => 06269028 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Method and apparatus for multistage readout operation' [patent_app_type] => 1 [patent_app_number] => 9/661631 [patent_app_country] => US [patent_app_date] => 2000-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 9514 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/269/06269028.pdf [firstpage_image] =>[orig_patent_app_number] => 661631 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/661631
Method and apparatus for multistage readout operation Sep 12, 2000 Issued
Array ( [id] => 1473336 [patent_doc_number] => 06407960 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Arrangement for programming selected device registers during initialization from an external memory' [patent_app_type] => B1 [patent_app_number] => 09/654831 [patent_app_country] => US [patent_app_date] => 2000-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1986 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/407/06407960.pdf [firstpage_image] =>[orig_patent_app_number] => 09654831 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/654831
Arrangement for programming selected device registers during initialization from an external memory Aug 31, 2000 Issued
Array ( [id] => 1368137 [patent_doc_number] => 06577532 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-06-10 [patent_title] => 'Method for performing analog over-program and under-program detection for a multistate memory cell' [patent_app_type] => B1 [patent_app_number] => 09/652802 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7236 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/577/06577532.pdf [firstpage_image] =>[orig_patent_app_number] => 09652802 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/652802
Method for performing analog over-program and under-program detection for a multistate memory cell Aug 30, 2000 Issued
Array ( [id] => 1346404 [patent_doc_number] => 06594192 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-15 [patent_title] => 'Integrated volatile and non-volatile memory' [patent_app_type] => B1 [patent_app_number] => 09/653495 [patent_app_country] => US [patent_app_date] => 2000-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4250 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/594/06594192.pdf [firstpage_image] =>[orig_patent_app_number] => 09653495 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/653495
Integrated volatile and non-volatile memory Aug 30, 2000 Issued
Array ( [id] => 1437720 [patent_doc_number] => 06356506 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'Full page increment/decrement burst for DDR SDRAM/SGRAM' [patent_app_type] => B1 [patent_app_number] => 09/650567 [patent_app_country] => US [patent_app_date] => 2000-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4503 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 27 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/356/06356506.pdf [firstpage_image] =>[orig_patent_app_number] => 09650567 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/650567
Full page increment/decrement burst for DDR SDRAM/SGRAM Aug 29, 2000 Issued
Array ( [id] => 4393943 [patent_doc_number] => 06295239 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-25 [patent_title] => 'Control apparatus for testing a random access memory' [patent_app_type] => 1 [patent_app_number] => 9/649125 [patent_app_country] => US [patent_app_date] => 2000-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1501 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/295/06295239.pdf [firstpage_image] =>[orig_patent_app_number] => 649125 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/649125
Control apparatus for testing a random access memory Aug 27, 2000 Issued
90/005801 PROGRAMMABLE LOGIC ARRAY INTEGRATED CIRCUITS Aug 27, 2000 Issued
90/005800 PROGRAMMABLE LOGIC ARRAY INTEGRATED CIRCUITS Aug 27, 2000 Issued
90/005802 PROGRAMMABLE LOGIC ARRAY INTEGRATED CIRCUITS Aug 27, 2000 Issued
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