Search

Vu Anh Le

Examiner (ID: 15321, Phone: (571)272-1871 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2825, 0, 2824, 2511
Total Applications
2999
Issued Applications
2864
Pending Applications
54
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4309164 [patent_doc_number] => 06181611 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Techniques of isolating and enabling higher speed access of memory cells' [patent_app_type] => 1 [patent_app_number] => 9/399906 [patent_app_country] => US [patent_app_date] => 1999-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3423 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/181/06181611.pdf [firstpage_image] =>[orig_patent_app_number] => 399906 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/399906
Techniques of isolating and enabling higher speed access of memory cells Sep 20, 1999 Issued
Array ( [id] => 4251615 [patent_doc_number] => 06091630 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-18 [patent_title] => 'Radiation hardened semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 9/393125 [patent_app_country] => US [patent_app_date] => 1999-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3063 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/091/06091630.pdf [firstpage_image] =>[orig_patent_app_number] => 393125 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/393125
Radiation hardened semiconductor memory Sep 9, 1999 Issued
Array ( [id] => 4327095 [patent_doc_number] => 06243280 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-05 [patent_title] => 'Selective match line pre-charging in a partitioned content addressable memory array' [patent_app_type] => 1 [patent_app_number] => 9/391989 [patent_app_country] => US [patent_app_date] => 1999-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5493 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/243/06243280.pdf [firstpage_image] =>[orig_patent_app_number] => 391989 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/391989
Selective match line pre-charging in a partitioned content addressable memory array Sep 8, 1999 Issued
Array ( [id] => 4395297 [patent_doc_number] => 06278639 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Booster circuit having booster cell sections connected in parallel, voltage generating circuit and semiconductor memory which use such booster circuit' [patent_app_type] => 1 [patent_app_number] => 9/392127 [patent_app_country] => US [patent_app_date] => 1999-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 20 [patent_no_of_words] => 10998 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/278/06278639.pdf [firstpage_image] =>[orig_patent_app_number] => 392127 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/392127
Booster circuit having booster cell sections connected in parallel, voltage generating circuit and semiconductor memory which use such booster circuit Sep 7, 1999 Issued
Array ( [id] => 4170288 [patent_doc_number] => 06104652 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Method and memory device for dynamic cell plate sensing with AC equilibrate' [patent_app_type] => 1 [patent_app_number] => 9/389106 [patent_app_country] => US [patent_app_date] => 1999-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 7113 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/104/06104652.pdf [firstpage_image] =>[orig_patent_app_number] => 389106 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/389106
Method and memory device for dynamic cell plate sensing with AC equilibrate Sep 1, 1999 Issued
Array ( [id] => 4418993 [patent_doc_number] => 06240042 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-29 [patent_title] => 'Output circuit for a double data rate dynamic random access memory, double data rate dynamic random access memory, method of clocking data out from a double data rate dynamic random access memory and method of providing a data strobe signal' [patent_app_type] => 1 [patent_app_number] => 9/389531 [patent_app_country] => US [patent_app_date] => 1999-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5455 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/240/06240042.pdf [firstpage_image] =>[orig_patent_app_number] => 389531 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/389531
Output circuit for a double data rate dynamic random access memory, double data rate dynamic random access memory, method of clocking data out from a double data rate dynamic random access memory and method of providing a data strobe signal Sep 1, 1999 Issued
Array ( [id] => 4229782 [patent_doc_number] => 06111789 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/388833 [patent_app_country] => US [patent_app_date] => 1999-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4492 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/111/06111789.pdf [firstpage_image] =>[orig_patent_app_number] => 388833 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/388833
Nonvolatile semiconductor memory device Aug 31, 1999 Issued
Array ( [id] => 1493350 [patent_doc_number] => 06418054 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-09 [patent_title] => 'Embedded methodology to program/erase reference cells used in sensing flash cells' [patent_app_type] => B1 [patent_app_number] => 09/387421 [patent_app_country] => US [patent_app_date] => 1999-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 5603 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/418/06418054.pdf [firstpage_image] =>[orig_patent_app_number] => 09387421 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/387421
Embedded methodology to program/erase reference cells used in sensing flash cells Aug 30, 1999 Issued
Array ( [id] => 4110589 [patent_doc_number] => 06097657 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Method for reading out the contents of a serial memory' [patent_app_type] => 1 [patent_app_number] => 9/384823 [patent_app_country] => US [patent_app_date] => 1999-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 8575 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/097/06097657.pdf [firstpage_image] =>[orig_patent_app_number] => 384823 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/384823
Method for reading out the contents of a serial memory Aug 26, 1999 Issued
Array ( [id] => 4368304 [patent_doc_number] => 06175514 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Content addressable memory device' [patent_app_type] => 1 [patent_app_number] => 9/384810 [patent_app_country] => US [patent_app_date] => 1999-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 10666 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/175/06175514.pdf [firstpage_image] =>[orig_patent_app_number] => 384810 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/384810
Content addressable memory device Aug 26, 1999 Issued
Array ( [id] => 4204556 [patent_doc_number] => 06044011 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-28 [patent_title] => 'Static-random-access-memory cell' [patent_app_type] => 1 [patent_app_number] => 9/382236 [patent_app_country] => US [patent_app_date] => 1999-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5372 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/044/06044011.pdf [firstpage_image] =>[orig_patent_app_number] => 382236 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/382236
Static-random-access-memory cell Aug 23, 1999 Issued
Array ( [id] => 4095699 [patent_doc_number] => 06163476 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Static-random-access-memory cell' [patent_app_type] => 1 [patent_app_number] => 9/382216 [patent_app_country] => US [patent_app_date] => 1999-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5376 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/163/06163476.pdf [firstpage_image] =>[orig_patent_app_number] => 382216 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/382216
Static-random-access-memory cell Aug 23, 1999 Issued
Array ( [id] => 4095864 [patent_doc_number] => 06163487 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Charge pump circuit for integrated memory devices' [patent_app_type] => 1 [patent_app_number] => 9/378427 [patent_app_country] => US [patent_app_date] => 1999-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 4488 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/163/06163487.pdf [firstpage_image] =>[orig_patent_app_number] => 378427 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/378427
Charge pump circuit for integrated memory devices Aug 19, 1999 Issued
Array ( [id] => 4117304 [patent_doc_number] => 06101150 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Method and apparatus for using supply voltage for testing in semiconductor memory devices' [patent_app_type] => 1 [patent_app_number] => 9/375893 [patent_app_country] => US [patent_app_date] => 1999-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2988 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/101/06101150.pdf [firstpage_image] =>[orig_patent_app_number] => 375893 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/375893
Method and apparatus for using supply voltage for testing in semiconductor memory devices Aug 16, 1999 Issued
Array ( [id] => 4302572 [patent_doc_number] => 06212109 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Dynamic memory array having write data applied to selected bit line sense amplifiers before sensing to write associated selected memory cells' [patent_app_type] => 1 [patent_app_number] => 9/372320 [patent_app_country] => US [patent_app_date] => 1999-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 50 [patent_no_of_words] => 74678 [patent_no_of_claims] => 96 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/212/06212109.pdf [firstpage_image] =>[orig_patent_app_number] => 372320 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/372320
Dynamic memory array having write data applied to selected bit line sense amplifiers before sensing to write associated selected memory cells Aug 10, 1999 Issued
Array ( [id] => 4170148 [patent_doc_number] => 06104643 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Integrated circuit clock input buffer' [patent_app_type] => 1 [patent_app_number] => 9/371297 [patent_app_country] => US [patent_app_date] => 1999-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2995 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/104/06104643.pdf [firstpage_image] =>[orig_patent_app_number] => 371297 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/371297
Integrated circuit clock input buffer Aug 9, 1999 Issued
Array ( [id] => 4197281 [patent_doc_number] => 06094386 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-25 [patent_title] => 'Semiconductor memory device of redundant circuit system' [patent_app_type] => 1 [patent_app_number] => 9/371535 [patent_app_country] => US [patent_app_date] => 1999-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 5889 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/094/06094386.pdf [firstpage_image] =>[orig_patent_app_number] => 371535 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/371535
Semiconductor memory device of redundant circuit system Aug 9, 1999 Issued
Array ( [id] => 4144138 [patent_doc_number] => 06034884 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-07 [patent_title] => 'Nonvolatile dynamic random access memory with ferroelectric capacitors' [patent_app_type] => 1 [patent_app_number] => 9/369933 [patent_app_country] => US [patent_app_date] => 1999-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5847 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/034/06034884.pdf [firstpage_image] =>[orig_patent_app_number] => 369933 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/369933
Nonvolatile dynamic random access memory with ferroelectric capacitors Aug 8, 1999 Issued
Array ( [id] => 4103073 [patent_doc_number] => 06134177 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Redundancy decoding circuit having automatic deselection' [patent_app_type] => 1 [patent_app_number] => 9/366433 [patent_app_country] => US [patent_app_date] => 1999-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 2560 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/134/06134177.pdf [firstpage_image] =>[orig_patent_app_number] => 366433 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/366433
Redundancy decoding circuit having automatic deselection Aug 1, 1999 Issued
Array ( [id] => 4367864 [patent_doc_number] => 06201735 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-13 [patent_title] => 'Electrically erasable and programmable nonvolatile semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 9/362719 [patent_app_country] => US [patent_app_date] => 1999-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 29 [patent_no_of_words] => 13832 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/201/06201735.pdf [firstpage_image] =>[orig_patent_app_number] => 362719 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/362719
Electrically erasable and programmable nonvolatile semiconductor memory Jul 28, 1999 Issued
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