Search

Vu Anh Le

Examiner (ID: 15321, Phone: (571)272-1871 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2825, 0, 2824, 2511
Total Applications
2999
Issued Applications
2864
Pending Applications
54
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4115105 [patent_doc_number] => 06052322 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'Memory circuit voltage regulator' [patent_app_type] => 1 [patent_app_number] => 9/363003 [patent_app_country] => US [patent_app_date] => 1999-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 7 [patent_no_of_words] => 7211 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/052/06052322.pdf [firstpage_image] =>[orig_patent_app_number] => 363003 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/363003
Memory circuit voltage regulator Jul 27, 1999 Issued
Array ( [id] => 4309111 [patent_doc_number] => 06181607 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Reversed split-gate cell array' [patent_app_type] => 1 [patent_app_number] => 9/351740 [patent_app_country] => US [patent_app_date] => 1999-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5171 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/181/06181607.pdf [firstpage_image] =>[orig_patent_app_number] => 351740 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/351740
Reversed split-gate cell array Jul 11, 1999 Issued
Array ( [id] => 4420168 [patent_doc_number] => 06266289 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-24 [patent_title] => 'Method of toroid write and read, memory cell and memory device for realizing the same' [patent_app_type] => 1 [patent_app_number] => 9/341535 [patent_app_country] => US [patent_app_date] => 1999-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 7112 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/266/06266289.pdf [firstpage_image] =>[orig_patent_app_number] => 341535 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/341535
Method of toroid write and read, memory cell and memory device for realizing the same Jul 11, 1999 Issued
Array ( [id] => 4252165 [patent_doc_number] => 06166958 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Semiconductor memory device, method for manufacturing the same, and method for controlling the same' [patent_app_type] => 1 [patent_app_number] => 9/349929 [patent_app_country] => US [patent_app_date] => 1999-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 46 [patent_no_of_words] => 9948 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166958.pdf [firstpage_image] =>[orig_patent_app_number] => 349929 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/349929
Semiconductor memory device, method for manufacturing the same, and method for controlling the same Jul 7, 1999 Issued
Array ( [id] => 4197305 [patent_doc_number] => 06160755 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Clock signal from an adjustable oscillator for an integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/348532 [patent_app_country] => US [patent_app_date] => 1999-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 9941 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/160/06160755.pdf [firstpage_image] =>[orig_patent_app_number] => 348532 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/348532
Clock signal from an adjustable oscillator for an integrated circuit Jul 6, 1999 Issued
Array ( [id] => 4185502 [patent_doc_number] => 06141268 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-31 [patent_title] => 'Column redundancy in semiconductor memories' [patent_app_type] => 1 [patent_app_number] => 9/348314 [patent_app_country] => US [patent_app_date] => 1999-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3556 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/141/06141268.pdf [firstpage_image] =>[orig_patent_app_number] => 348314 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/348314
Column redundancy in semiconductor memories Jul 6, 1999 Issued
Array ( [id] => 1600107 [patent_doc_number] => 06493270 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-12-10 [patent_title] => 'Leakage detection in programming algorithm for a flash memory device' [patent_app_type] => B2 [patent_app_number] => 09/346454 [patent_app_country] => US [patent_app_date] => 1999-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 6286 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/493/06493270.pdf [firstpage_image] =>[orig_patent_app_number] => 09346454 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/346454
Leakage detection in programming algorithm for a flash memory device Jun 30, 1999 Issued
Array ( [id] => 4265898 [patent_doc_number] => 06208553 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'High density non-volatile memory device incorporating thiol-derivatized porphyrins' [patent_app_type] => 1 [patent_app_number] => 9/346221 [patent_app_country] => US [patent_app_date] => 1999-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 28 [patent_no_of_words] => 34631 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/208/06208553.pdf [firstpage_image] =>[orig_patent_app_number] => 346221 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/346221
High density non-volatile memory device incorporating thiol-derivatized porphyrins Jun 30, 1999 Issued
Array ( [id] => 4170527 [patent_doc_number] => 06157589 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-05 [patent_title] => 'Dynamic semiconductor memory device and method for initializing a dynamic semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/343431 [patent_app_country] => US [patent_app_date] => 1999-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2445 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/157/06157589.pdf [firstpage_image] =>[orig_patent_app_number] => 343431 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/343431
Dynamic semiconductor memory device and method for initializing a dynamic semiconductor memory device Jun 29, 1999 Issued
Array ( [id] => 4368550 [patent_doc_number] => 06175531 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Dynamic semiconductor memory device and method for initializing a dynamic semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/343429 [patent_app_country] => US [patent_app_date] => 1999-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3902 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/175/06175531.pdf [firstpage_image] =>[orig_patent_app_number] => 343429 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/343429
Dynamic semiconductor memory device and method for initializing a dynamic semiconductor memory device Jun 29, 1999 Issued
Array ( [id] => 4417475 [patent_doc_number] => 06172913 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Method for fast programming floating gate memories by tunnel effect' [patent_app_type] => 1 [patent_app_number] => 9/344425 [patent_app_country] => US [patent_app_date] => 1999-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 4 [patent_no_of_words] => 2591 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/172/06172913.pdf [firstpage_image] =>[orig_patent_app_number] => 344425 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/344425
Method for fast programming floating gate memories by tunnel effect Jun 24, 1999 Issued
Array ( [id] => 4251979 [patent_doc_number] => 06166947 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'Manganese oxide material having MnO.sub.3 as a matrix' [patent_app_type] => 1 [patent_app_number] => 9/335525 [patent_app_country] => US [patent_app_date] => 1999-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2166 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/166/06166947.pdf [firstpage_image] =>[orig_patent_app_number] => 335525 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/335525
Manganese oxide material having MnO.sub.3 as a matrix Jun 17, 1999 Issued
Array ( [id] => 4110246 [patent_doc_number] => 06097634 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-01 [patent_title] => 'Latch-type sensing circuit and program-verify circuit' [patent_app_type] => 1 [patent_app_number] => 9/335033 [patent_app_country] => US [patent_app_date] => 1999-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 35 [patent_no_of_words] => 15417 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/097/06097634.pdf [firstpage_image] =>[orig_patent_app_number] => 335033 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/335033
Latch-type sensing circuit and program-verify circuit Jun 15, 1999 Issued
Array ( [id] => 4144548 [patent_doc_number] => 06016263 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-18 [patent_title] => 'Storage device designed for use with PC system and formed of RAM module' [patent_app_type] => 1 [patent_app_number] => 9/333982 [patent_app_country] => US [patent_app_date] => 1999-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1826 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/016/06016263.pdf [firstpage_image] =>[orig_patent_app_number] => 333982 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/333982
Storage device designed for use with PC system and formed of RAM module Jun 15, 1999 Issued
Array ( [id] => 4233927 [patent_doc_number] => 06011718 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Current source programming of electrically programmable memory arrays' [patent_app_type] => 1 [patent_app_number] => 9/334291 [patent_app_country] => US [patent_app_date] => 1999-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2860 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/011/06011718.pdf [firstpage_image] =>[orig_patent_app_number] => 334291 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/334291
Current source programming of electrically programmable memory arrays Jun 15, 1999 Issued
Array ( [id] => 4102949 [patent_doc_number] => 06134168 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Circuit and method for internal refresh counter' [patent_app_type] => 1 [patent_app_number] => 9/327734 [patent_app_country] => US [patent_app_date] => 1999-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 29 [patent_no_of_words] => 6545 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/134/06134168.pdf [firstpage_image] =>[orig_patent_app_number] => 327734 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/327734
Circuit and method for internal refresh counter Jun 7, 1999 Issued
Array ( [id] => 4095740 [patent_doc_number] => 06163479 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Method for performing analog over-program and under-program detection for a multistate memory cell' [patent_app_type] => 1 [patent_app_number] => 9/328075 [patent_app_country] => US [patent_app_date] => 1999-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7134 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/163/06163479.pdf [firstpage_image] =>[orig_patent_app_number] => 328075 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/328075
Method for performing analog over-program and under-program detection for a multistate memory cell Jun 7, 1999 Issued
Array ( [id] => 4116924 [patent_doc_number] => 06101124 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-08 [patent_title] => 'Memory block for realizing semiconductor memory devices and corresponding manufacturing process' [patent_app_type] => 1 [patent_app_number] => 9/327111 [patent_app_country] => US [patent_app_date] => 1999-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 15 [patent_no_of_words] => 5393 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/101/06101124.pdf [firstpage_image] =>[orig_patent_app_number] => 327111 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/327111
Memory block for realizing semiconductor memory devices and corresponding manufacturing process Jun 6, 1999 Issued
Array ( [id] => 4102973 [patent_doc_number] => 06134171 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Semiconductor integrated circuit device having hierarchical power source arrangement' [patent_app_type] => 1 [patent_app_number] => 9/317860 [patent_app_country] => US [patent_app_date] => 1999-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 68 [patent_no_of_words] => 48754 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/134/06134171.pdf [firstpage_image] =>[orig_patent_app_number] => 317860 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/317860
Semiconductor integrated circuit device having hierarchical power source arrangement May 24, 1999 Issued
Array ( [id] => 4369193 [patent_doc_number] => 06169690 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-02 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/317238 [patent_app_country] => US [patent_app_date] => 1999-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 50 [patent_no_of_words] => 24160 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 384 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/169/06169690.pdf [firstpage_image] =>[orig_patent_app_number] => 317238 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/317238
Non-volatile semiconductor memory device May 23, 1999 Issued
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