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Vu Anh Le

Examiner (ID: 5206, Phone: (571)272-1871 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
0, 2818, 2511, 2825, 2824
Total Applications
2999
Issued Applications
2864
Pending Applications
54
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18766739 [patent_doc_number] => 11817146 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-14 [patent_title] => Phase-change memory [patent_app_type] => utility [patent_app_number] => 17/608172 [patent_app_country] => US [patent_app_date] => 2020-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2330 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17608172 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/608172
Phase-change memory Apr 20, 2020 Issued
Array ( [id] => 18130104 [patent_doc_number] => 11556311 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-17 [patent_title] => Reconfigurable input precision in-memory computing [patent_app_type] => utility [patent_app_number] => 16/850395 [patent_app_country] => US [patent_app_date] => 2020-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 26 [patent_no_of_words] => 18163 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16850395 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/850395
Reconfigurable input precision in-memory computing Apr 15, 2020 Issued
Array ( [id] => 16691877 [patent_doc_number] => 20210074356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-03-11 [patent_title] => DATA WRITE-IN METHOD AND NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 16/849976 [patent_app_country] => US [patent_app_date] => 2020-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16849976 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/849976
Data write-in method and non-volatile memory Apr 14, 2020 Issued
Array ( [id] => 16730916 [patent_doc_number] => 20210098064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-01 [patent_title] => RESISTIVE MEMORY DEVICES AND METHODS OF OPERATING RESISTIVE MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 16/848149 [patent_app_country] => US [patent_app_date] => 2020-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12327 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16848149 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/848149
Resistive memory devices and methods of operating resistive memory devices Apr 13, 2020 Issued
Array ( [id] => 17158783 [patent_doc_number] => 20210319834 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-14 [patent_title] => PROACTIVE READ DISTURB MITIGATION [patent_app_type] => utility [patent_app_number] => 16/846974 [patent_app_country] => US [patent_app_date] => 2020-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10644 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16846974 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/846974
Proactive read disturb mitigation Apr 12, 2020 Issued
Array ( [id] => 16402082 [patent_doc_number] => 20200342940 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => CIRCUIT AND METHOD FOR AT SPEED DETECTION OF A WORD LINE FAULT CONDITION IN A MEMORY CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/846938 [patent_app_country] => US [patent_app_date] => 2020-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8731 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16846938 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/846938
Circuit and method for at speed detection of a word line fault condition in a memory circuit Apr 12, 2020 Issued
Array ( [id] => 17893054 [patent_doc_number] => 11456033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-27 [patent_title] => Dedicated commands for memory operations [patent_app_type] => utility [patent_app_number] => 16/846481 [patent_app_country] => US [patent_app_date] => 2020-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 6528 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16846481 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/846481
Dedicated commands for memory operations Apr 12, 2020 Issued
Array ( [id] => 16865642 [patent_doc_number] => 11024394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-01 [patent_title] => Implementing sticky read using error control success rate associated with a memory sub-system [patent_app_type] => utility [patent_app_number] => 16/844269 [patent_app_country] => US [patent_app_date] => 2020-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 9018 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16844269 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/844269
Implementing sticky read using error control success rate associated with a memory sub-system Apr 8, 2020 Issued
Array ( [id] => 16193907 [patent_doc_number] => 20200234756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => Memory System Topologies Including A Memory Die Stack [patent_app_type] => utility [patent_app_number] => 16/842368 [patent_app_country] => US [patent_app_date] => 2020-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26389 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16842368 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/842368
Memory system topologies including a memory die stack Apr 6, 2020 Issued
Array ( [id] => 16644405 [patent_doc_number] => 10922262 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Semiconductor layered device with data bus inversion [patent_app_type] => utility [patent_app_number] => 16/840281 [patent_app_country] => US [patent_app_date] => 2020-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 13650 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16840281 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/840281
Semiconductor layered device with data bus inversion Apr 2, 2020 Issued
Array ( [id] => 16193895 [patent_doc_number] => 20200234744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => SEMICONDUCTOR STORAGE DEVICE AND METHOD OF CONTROLLING THE SAME [patent_app_type] => utility [patent_app_number] => 16/838091 [patent_app_country] => US [patent_app_date] => 2020-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13879 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16838091 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/838091
Semiconductor storage device and method of controlling the same Apr 1, 2020 Issued
Array ( [id] => 17002327 [patent_doc_number] => 11081149 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-03 [patent_title] => Memory device for artificial intelligence operation [patent_app_type] => utility [patent_app_number] => 16/836906 [patent_app_country] => US [patent_app_date] => 2020-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3314 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16836906 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/836906
Memory device for artificial intelligence operation Mar 30, 2020 Issued
Array ( [id] => 16181138 [patent_doc_number] => 20200228107 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => SHIFTER CIRCUITS HAVING REGISTERS ARRANGED IN A FOLDED TOPOLOGY [patent_app_type] => utility [patent_app_number] => 16/834892 [patent_app_country] => US [patent_app_date] => 2020-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6826 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16834892 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/834892
Shifter circuits having registers arranged in a folded topology Mar 29, 2020 Issued
Array ( [id] => 17668098 [patent_doc_number] => 11361801 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-14 [patent_title] => Sub-threshold voltage leakage current tracking [patent_app_type] => utility [patent_app_number] => 16/834835 [patent_app_country] => US [patent_app_date] => 2020-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6755 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16834835 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/834835
Sub-threshold voltage leakage current tracking Mar 29, 2020 Issued
Array ( [id] => 16834972 [patent_doc_number] => 11011230 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-05-18 [patent_title] => Memory device and operation method thereof [patent_app_type] => utility [patent_app_number] => 16/830718 [patent_app_country] => US [patent_app_date] => 2020-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3547 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16830718 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/830718
Memory device and operation method thereof Mar 25, 2020 Issued
Array ( [id] => 17062914 [patent_doc_number] => 11107523 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-08-31 [patent_title] => Multi-level cell (MLC) cross-point memory [patent_app_type] => utility [patent_app_number] => 16/828589 [patent_app_country] => US [patent_app_date] => 2020-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 30 [patent_no_of_words] => 9864 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16828589 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/828589
Multi-level cell (MLC) cross-point memory Mar 23, 2020 Issued
Array ( [id] => 16364296 [patent_doc_number] => 20200321047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => MULTI-DIE MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/823122 [patent_app_country] => US [patent_app_date] => 2020-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17596 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16823122 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/823122
Multi-die memory device Mar 17, 2020 Issued
Array ( [id] => 16803104 [patent_doc_number] => 10998055 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Semiconductor storage device [patent_app_type] => utility [patent_app_number] => 16/820809 [patent_app_country] => US [patent_app_date] => 2020-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13746 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16820809 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/820809
Semiconductor storage device Mar 16, 2020 Issued
Array ( [id] => 16528470 [patent_doc_number] => 20200402551 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => MEMORY DEVICE, METHOD OF OPERATING THE MEMORY DEVICE, MEMORY MODULE, AND METHOD OF OPERATING THE MEMORY MODULE [patent_app_type] => utility [patent_app_number] => 16/821615 [patent_app_country] => US [patent_app_date] => 2020-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11374 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16821615 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/821615
Memory device, method of operating the memory device, memory module, and method of operating the memory module Mar 16, 2020 Issued
Array ( [id] => 17085243 [patent_doc_number] => 20210280250 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-09-09 [patent_title] => ARCHITECTURE FOR TERNARY CONTENT-ADDRESSABLE MEMORY SEARCH [patent_app_type] => utility [patent_app_number] => 16/811574 [patent_app_country] => US [patent_app_date] => 2020-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11050 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16811574 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/811574
Architecture for ternary content-addressable memory search Mar 5, 2020 Issued
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