Search

Vu Anh Le

Examiner (ID: 15321, Phone: (571)272-1871 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2825, 0, 2824, 2511
Total Applications
2999
Issued Applications
2864
Pending Applications
54
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4097192 [patent_doc_number] => 06026050 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Method and apparatus for adaptively adjusting the timing of a clock signal used to latch digital signals, and memory device using same' [patent_app_type] => 1 [patent_app_number] => 9/248194 [patent_app_country] => US [patent_app_date] => 1999-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 16 [patent_no_of_words] => 15239 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/026/06026050.pdf [firstpage_image] =>[orig_patent_app_number] => 248194 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/248194
Method and apparatus for adaptively adjusting the timing of a clock signal used to latch digital signals, and memory device using same Feb 9, 1999 Issued
Array ( [id] => 4115025 [patent_doc_number] => 06052316 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-18 [patent_title] => 'Output buffer circuitry for semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 9/245132 [patent_app_country] => US [patent_app_date] => 1999-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 9031 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/052/06052316.pdf [firstpage_image] =>[orig_patent_app_number] => 245132 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/245132
Output buffer circuitry for semiconductor integrated circuit device Feb 3, 1999 Issued
Array ( [id] => 4191888 [patent_doc_number] => 06038170 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Semiconductor integrated circuit device including a plurality of divided sub-bit lines' [patent_app_type] => 1 [patent_app_number] => 9/241634 [patent_app_country] => US [patent_app_date] => 1999-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 30 [patent_no_of_words] => 10738 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/038/06038170.pdf [firstpage_image] =>[orig_patent_app_number] => 241634 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/241634
Semiconductor integrated circuit device including a plurality of divided sub-bit lines Feb 1, 1999 Issued
Array ( [id] => 4017718 [patent_doc_number] => 06005819 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Demand-anticipating power control circuits for integrated circuit devices and methods of operation thereof' [patent_app_type] => 1 [patent_app_number] => 9/241835 [patent_app_country] => US [patent_app_date] => 1999-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 4363 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/005/06005819.pdf [firstpage_image] =>[orig_patent_app_number] => 241835 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/241835
Demand-anticipating power control circuits for integrated circuit devices and methods of operation thereof Jan 31, 1999 Issued
Array ( [id] => 4145128 [patent_doc_number] => 06147893 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-14 [patent_title] => 'Programmable read only memory with high speed differential sensing at low operating voltage' [patent_app_type] => 1 [patent_app_number] => 9/238531 [patent_app_country] => US [patent_app_date] => 1999-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9439 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/147/06147893.pdf [firstpage_image] =>[orig_patent_app_number] => 238531 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/238531
Programmable read only memory with high speed differential sensing at low operating voltage Jan 26, 1999 Issued
Array ( [id] => 4170261 [patent_doc_number] => 06108264 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-22 [patent_title] => 'Dynamic type semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/234101 [patent_app_country] => US [patent_app_date] => 1999-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 18 [patent_no_of_words] => 11805 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/108/06108264.pdf [firstpage_image] =>[orig_patent_app_number] => 234101 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/234101
Dynamic type semiconductor memory device Jan 18, 1999 Issued
Array ( [id] => 3961932 [patent_doc_number] => 05999435 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Content addressable memory device' [patent_app_type] => 1 [patent_app_number] => 9/231284 [patent_app_country] => US [patent_app_date] => 1999-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 10660 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999435.pdf [firstpage_image] =>[orig_patent_app_number] => 231284 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/231284
Content addressable memory device Jan 14, 1999 Issued
Array ( [id] => 4234000 [patent_doc_number] => 06011723 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Nonvolatile semiconductor memory device including a circuit for providing a boosted potential' [patent_app_type] => 1 [patent_app_number] => 9/228278 [patent_app_country] => US [patent_app_date] => 1999-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 4782 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/011/06011723.pdf [firstpage_image] =>[orig_patent_app_number] => 228278 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/228278
Nonvolatile semiconductor memory device including a circuit for providing a boosted potential Jan 10, 1999 Issued
Array ( [id] => 4140379 [patent_doc_number] => 06128240 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Cancellation of redundant elements with a cancel bank' [patent_app_type] => 1 [patent_app_number] => 9/225811 [patent_app_country] => US [patent_app_date] => 1999-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3457 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/128/06128240.pdf [firstpage_image] =>[orig_patent_app_number] => 225811 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/225811
Cancellation of redundant elements with a cancel bank Jan 4, 1999 Issued
Array ( [id] => 3964094 [patent_doc_number] => 05978281 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Method and apparatus for preventing postamble corruption within a memory system' [patent_app_type] => 1 [patent_app_number] => 9/225535 [patent_app_country] => US [patent_app_date] => 1999-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5278 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978281.pdf [firstpage_image] =>[orig_patent_app_number] => 225535 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/225535
Method and apparatus for preventing postamble corruption within a memory system Jan 3, 1999 Issued
Array ( [id] => 4159264 [patent_doc_number] => 06064586 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-16 [patent_title] => 'Method for holographic data storage and retrieval' [patent_app_type] => 1 [patent_app_number] => 9/224031 [patent_app_country] => US [patent_app_date] => 1998-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 7285 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/064/06064586.pdf [firstpage_image] =>[orig_patent_app_number] => 224031 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/224031
Method for holographic data storage and retrieval Dec 30, 1998 Issued
Array ( [id] => 4250606 [patent_doc_number] => 06081460 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'Integrated circuit devices having voltage level responsive mode-selection circuits therein and methods of operating same' [patent_app_type] => 1 [patent_app_number] => 9/223133 [patent_app_country] => US [patent_app_date] => 1998-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 2330 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081460.pdf [firstpage_image] =>[orig_patent_app_number] => 223133 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/223133
Integrated circuit devices having voltage level responsive mode-selection circuits therein and methods of operating same Dec 29, 1998 Issued
Array ( [id] => 4026029 [patent_doc_number] => 05963492 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Method of operation for shortening burn-in time' [patent_app_type] => 1 [patent_app_number] => 9/223333 [patent_app_country] => US [patent_app_date] => 1998-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2809 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963492.pdf [firstpage_image] =>[orig_patent_app_number] => 223333 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/223333
Method of operation for shortening burn-in time Dec 29, 1998 Issued
09/222035 METHOD FOR PROTECTING AN OVER-ERASURE OF REDUNDANT MEMORY CELLS IN NONVOLATILE MEMORY SEMICONDUCTOR DEVICES Dec 28, 1998 Abandoned
Array ( [id] => 4152745 [patent_doc_number] => 06061265 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-09 [patent_title] => 'Quantum magnetic memory' [patent_app_type] => 1 [patent_app_number] => 9/221233 [patent_app_country] => US [patent_app_date] => 1998-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5276 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/061/06061265.pdf [firstpage_image] =>[orig_patent_app_number] => 221233 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/221233
Quantum magnetic memory Dec 22, 1998 Issued
Array ( [id] => 4147787 [patent_doc_number] => 06122196 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Semiconductor non-volatile storage device capable of a high speed reading operation' [patent_app_type] => 1 [patent_app_number] => 9/219435 [patent_app_country] => US [patent_app_date] => 1998-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 23 [patent_no_of_words] => 9440 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/122/06122196.pdf [firstpage_image] =>[orig_patent_app_number] => 219435 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/219435
Semiconductor non-volatile storage device capable of a high speed reading operation Dec 22, 1998 Issued
Array ( [id] => 4193923 [patent_doc_number] => 06021071 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 9/215234 [patent_app_country] => US [patent_app_date] => 1998-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 7713 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/021/06021071.pdf [firstpage_image] =>[orig_patent_app_number] => 215234 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/215234
Semiconductor integrated circuit Dec 17, 1998 Issued
Array ( [id] => 3940044 [patent_doc_number] => 05953251 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Programming method for nonvolatile memories' [patent_app_type] => 1 [patent_app_number] => 9/215933 [patent_app_country] => US [patent_app_date] => 1998-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2447 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/953/05953251.pdf [firstpage_image] =>[orig_patent_app_number] => 215933 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/215933
Programming method for nonvolatile memories Dec 17, 1998 Issued
Array ( [id] => 4116432 [patent_doc_number] => 06023424 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Nonvolatile semiconductor memory device having verify function' [patent_app_type] => 1 [patent_app_number] => 9/213411 [patent_app_country] => US [patent_app_date] => 1998-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 130 [patent_no_of_words] => 13562 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/023/06023424.pdf [firstpage_image] =>[orig_patent_app_number] => 213411 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/213411
Nonvolatile semiconductor memory device having verify function Dec 16, 1998 Issued
Array ( [id] => 4250813 [patent_doc_number] => 06081473 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-27 [patent_title] => 'FPGA integrated circuit having embedded sram memory blocks each with statically and dynamically controllable read mode' [patent_app_type] => 1 [patent_app_number] => 9/212331 [patent_app_country] => US [patent_app_date] => 1998-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 34 [patent_no_of_words] => 32513 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/081/06081473.pdf [firstpage_image] =>[orig_patent_app_number] => 212331 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/212331
FPGA integrated circuit having embedded sram memory blocks each with statically and dynamically controllable read mode Dec 14, 1998 Issued
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