Search

Vu Anh Le

Examiner (ID: 15321, Phone: (571)272-1871 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2825, 0, 2824, 2511
Total Applications
2999
Issued Applications
2864
Pending Applications
54
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3962307 [patent_doc_number] => 05999459 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'High-performance pass-gate isolation circuitry' [patent_app_type] => 1 [patent_app_number] => 9/085151 [patent_app_country] => US [patent_app_date] => 1998-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3423 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999459.pdf [firstpage_image] =>[orig_patent_app_number] => 085151 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/085151
High-performance pass-gate isolation circuitry May 26, 1998 Issued
Array ( [id] => 4065180 [patent_doc_number] => 05970003 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/084251 [patent_app_country] => US [patent_app_date] => 1998-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13569 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/970/05970003.pdf [firstpage_image] =>[orig_patent_app_number] => 084251 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/084251
Semiconductor memory device May 25, 1998 Issued
09/081243 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE HAVING ELECTRICALLY AND COLLECTIVELY ERASABLE CHARACTERISTICS May 18, 1998 Abandoned
Array ( [id] => 4102543 [patent_doc_number] => 06134140 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-17 [patent_title] => 'Nonvolatile semiconductor memory device with soft-programming to adjust erased state of memory cells' [patent_app_type] => 1 [patent_app_number] => 9/078137 [patent_app_country] => US [patent_app_date] => 1998-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 68 [patent_no_of_words] => 43551 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/134/06134140.pdf [firstpage_image] =>[orig_patent_app_number] => 078137 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/078137
Nonvolatile semiconductor memory device with soft-programming to adjust erased state of memory cells May 13, 1998 Issued
Array ( [id] => 4192133 [patent_doc_number] => 06038185 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Method and apparatus for a serial access memory' [patent_app_type] => 1 [patent_app_number] => 9/076751 [patent_app_country] => US [patent_app_date] => 1998-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 8575 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/038/06038185.pdf [firstpage_image] =>[orig_patent_app_number] => 076751 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/076751
Method and apparatus for a serial access memory May 11, 1998 Issued
Array ( [id] => 4417296 [patent_doc_number] => 06172899 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-09 [patent_title] => 'Static-random-access-memory cell' [patent_app_type] => 1 [patent_app_number] => 9/074952 [patent_app_country] => US [patent_app_date] => 1998-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5339 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/172/06172899.pdf [firstpage_image] =>[orig_patent_app_number] => 074952 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/074952
Static-random-access-memory cell May 7, 1998 Issued
Array ( [id] => 4025732 [patent_doc_number] => 05963471 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-05 [patent_title] => 'Semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/074651 [patent_app_country] => US [patent_app_date] => 1998-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 47 [patent_no_of_words] => 9862 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/963/05963471.pdf [firstpage_image] =>[orig_patent_app_number] => 074651 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/074651
Semiconductor device May 7, 1998 Issued
Array ( [id] => 3937026 [patent_doc_number] => 05946231 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'Non-volatile semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 9/072664 [patent_app_country] => US [patent_app_date] => 1998-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 62 [patent_no_of_words] => 19976 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/946/05946231.pdf [firstpage_image] =>[orig_patent_app_number] => 072664 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/072664
Non-volatile semiconductor memory device May 4, 1998 Issued
Array ( [id] => 4093446 [patent_doc_number] => 06055188 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Nonvolatile semiconductor memory device having a data circuit for erasing and writing operations' [patent_app_type] => 1 [patent_app_number] => 9/069854 [patent_app_country] => US [patent_app_date] => 1998-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 38 [patent_no_of_words] => 14686 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/055/06055188.pdf [firstpage_image] =>[orig_patent_app_number] => 069854 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/069854
Nonvolatile semiconductor memory device having a data circuit for erasing and writing operations Apr 29, 1998 Issued
Array ( [id] => 593191 [patent_doc_number] => 07447069 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-11-04 [patent_title] => 'Flash EEprom system' [patent_app_type] => utility [patent_app_number] => 09/064250 [patent_app_country] => US [patent_app_date] => 1998-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 9612 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/447/07447069.pdf [firstpage_image] =>[orig_patent_app_number] => 09064250 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/064250
Flash EEprom system Apr 21, 1998 Issued
Array ( [id] => 4010927 [patent_doc_number] => 05923615 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Synchronous pipelined burst memory and method for operating same' [patent_app_type] => 1 [patent_app_number] => 9/061953 [patent_app_country] => US [patent_app_date] => 1998-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2649 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923615.pdf [firstpage_image] =>[orig_patent_app_number] => 061953 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/061953
Synchronous pipelined burst memory and method for operating same Apr 16, 1998 Issued
Array ( [id] => 3947127 [patent_doc_number] => 05940326 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-17 [patent_title] => 'Method for erasing data stored in a nonvolatile memory device' [patent_app_type] => 1 [patent_app_number] => 9/062238 [patent_app_country] => US [patent_app_date] => 1998-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1160 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/940/05940326.pdf [firstpage_image] =>[orig_patent_app_number] => 062238 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/062238
Method for erasing data stored in a nonvolatile memory device Apr 16, 1998 Issued
Array ( [id] => 3960614 [patent_doc_number] => 05991223 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-23 [patent_title] => 'Synchronous semiconductor memory device operable in a burst mode' [patent_app_type] => 1 [patent_app_number] => 9/061254 [patent_app_country] => US [patent_app_date] => 1998-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 38 [patent_no_of_words] => 18117 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/991/05991223.pdf [firstpage_image] =>[orig_patent_app_number] => 061254 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/061254
Synchronous semiconductor memory device operable in a burst mode Apr 16, 1998 Issued
Array ( [id] => 4064795 [patent_doc_number] => 05969981 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Semiconductor memory device employing ferroelectric memory cell, attaining low power consumption while preventing deterioration of ferroelectric' [patent_app_type] => 1 [patent_app_number] => 9/061051 [patent_app_country] => US [patent_app_date] => 1998-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 44 [patent_no_of_words] => 15049 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/969/05969981.pdf [firstpage_image] =>[orig_patent_app_number] => 061051 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/061051
Semiconductor memory device employing ferroelectric memory cell, attaining low power consumption while preventing deterioration of ferroelectric Apr 15, 1998 Issued
09/060451 MEMORY SYSTEM WITH MULTIPLE ADDRESSING AND CONTROL BUSSES Apr 13, 1998 Issued
Array ( [id] => 4097068 [patent_doc_number] => 06026042 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-15 [patent_title] => 'Method and apparatus for enhancing the performance of semiconductor memory devices' [patent_app_type] => 1 [patent_app_number] => 9/058255 [patent_app_country] => US [patent_app_date] => 1998-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 4478 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/026/06026042.pdf [firstpage_image] =>[orig_patent_app_number] => 058255 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/058255
Method and apparatus for enhancing the performance of semiconductor memory devices Apr 9, 1998 Issued
Array ( [id] => 4027289 [patent_doc_number] => 05907514 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-25 [patent_title] => 'Circuit and method for controlling a redundant memory cell in an integrated memory circuit' [patent_app_type] => 1 [patent_app_number] => 9/058053 [patent_app_country] => US [patent_app_date] => 1998-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 7192 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/907/05907514.pdf [firstpage_image] =>[orig_patent_app_number] => 058053 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/058053
Circuit and method for controlling a redundant memory cell in an integrated memory circuit Apr 8, 1998 Issued
Array ( [id] => 4012544 [patent_doc_number] => 05986966 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Semiconductor memory device capable of effectively resetting sub word lines' [patent_app_type] => 1 [patent_app_number] => 9/055956 [patent_app_country] => US [patent_app_date] => 1998-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 4796 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/986/05986966.pdf [firstpage_image] =>[orig_patent_app_number] => 055956 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/055956
Semiconductor memory device capable of effectively resetting sub word lines Apr 6, 1998 Issued
Array ( [id] => 3970888 [patent_doc_number] => 05901082 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'Endurance testing system for an EEPROM' [patent_app_type] => 1 [patent_app_number] => 9/055853 [patent_app_country] => US [patent_app_date] => 1998-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2104 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/901/05901082.pdf [firstpage_image] =>[orig_patent_app_number] => 055853 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/055853
Endurance testing system for an EEPROM Apr 5, 1998 Issued
Array ( [id] => 4017655 [patent_doc_number] => 06005814 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Test mode entrance through clocked addresses' [patent_app_type] => 1 [patent_app_number] => 9/054654 [patent_app_country] => US [patent_app_date] => 1998-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5594 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/005/06005814.pdf [firstpage_image] =>[orig_patent_app_number] => 054654 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/054654
Test mode entrance through clocked addresses Apr 2, 1998 Issued
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