Search

Vu Anh Le

Examiner (ID: 15321, Phone: (571)272-1871 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2825, 0, 2824, 2511
Total Applications
2999
Issued Applications
2864
Pending Applications
54
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3789167 [patent_doc_number] => 05808939 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Non-volatile semiconductor memory device and data programming method' [patent_app_type] => 1 [patent_app_number] => 8/694404 [patent_app_country] => US [patent_app_date] => 1996-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 52 [patent_no_of_words] => 24184 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/808/05808939.pdf [firstpage_image] =>[orig_patent_app_number] => 694404 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/694404
Non-volatile semiconductor memory device and data programming method Aug 11, 1996 Issued
Array ( [id] => 3712968 [patent_doc_number] => 05675543 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Integrated semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/694533 [patent_app_country] => US [patent_app_date] => 1996-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3636 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675543.pdf [firstpage_image] =>[orig_patent_app_number] => 694533 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/694533
Integrated semiconductor memory device Aug 8, 1996 Issued
Array ( [id] => 3741006 [patent_doc_number] => 05666316 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Integrated seminconductor memory' [patent_app_type] => 1 [patent_app_number] => 8/694534 [patent_app_country] => US [patent_app_date] => 1996-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4024 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/666/05666316.pdf [firstpage_image] =>[orig_patent_app_number] => 694534 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/694534
Integrated seminconductor memory Aug 8, 1996 Issued
Array ( [id] => 3784082 [patent_doc_number] => 05774414 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-30 [patent_title] => 'Memory device and production method' [patent_app_type] => 1 [patent_app_number] => 8/694531 [patent_app_country] => US [patent_app_date] => 1996-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 21 [patent_no_of_words] => 4457 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/774/05774414.pdf [firstpage_image] =>[orig_patent_app_number] => 694531 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/694531
Memory device and production method Aug 8, 1996 Issued
Array ( [id] => 3712778 [patent_doc_number] => 05675530 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-07 [patent_title] => 'Ferroelectric memory device' [patent_app_type] => 1 [patent_app_number] => 8/691134 [patent_app_country] => US [patent_app_date] => 1996-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8922 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/675/05675530.pdf [firstpage_image] =>[orig_patent_app_number] => 691134 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/691134
Ferroelectric memory device Jul 31, 1996 Issued
Array ( [id] => 3780770 [patent_doc_number] => 05734607 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-31 [patent_title] => 'Method of manufacturing self-aligned bit-line and device manufactured therby' [patent_app_type] => 1 [patent_app_number] => 8/688069 [patent_app_country] => US [patent_app_date] => 1996-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4520 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 253 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/734/05734607.pdf [firstpage_image] =>[orig_patent_app_number] => 688069 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/688069
Method of manufacturing self-aligned bit-line and device manufactured therby Jul 28, 1996 Issued
Array ( [id] => 3697719 [patent_doc_number] => 05644537 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-01 [patent_title] => 'Memory device and serial-parallel data transform circuit' [patent_app_type] => 1 [patent_app_number] => 8/681169 [patent_app_country] => US [patent_app_date] => 1996-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 5416 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/644/05644537.pdf [firstpage_image] =>[orig_patent_app_number] => 681169 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/681169
Memory device and serial-parallel data transform circuit Jul 21, 1996 Issued
Array ( [id] => 3704335 [patent_doc_number] => 05680356 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-21 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 8/684068 [patent_app_country] => US [patent_app_date] => 1996-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 58 [patent_no_of_words] => 30502 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/680/05680356.pdf [firstpage_image] =>[orig_patent_app_number] => 684068 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/684068
Semiconductor integrated circuit device Jul 18, 1996 Issued
Array ( [id] => 4026236 [patent_doc_number] => RE036264 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-03 [patent_title] => 'Read circuit for accessing dynamic random access memories (DRAMs)' [patent_app_type] => 2 [patent_app_number] => 8/684338 [patent_app_country] => US [patent_app_date] => 1996-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5769 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 23 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/036/RE036264.pdf [firstpage_image] =>[orig_patent_app_number] => 684338 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/684338
Read circuit for accessing dynamic random access memories (DRAMs) Jul 18, 1996 Issued
Array ( [id] => 3659261 [patent_doc_number] => 05684751 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-04 [patent_title] => 'Dynamic memory refresh controller utilizing array voltage' [patent_app_type] => 1 [patent_app_number] => 8/682329 [patent_app_country] => US [patent_app_date] => 1996-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4964 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/684/05684751.pdf [firstpage_image] =>[orig_patent_app_number] => 682329 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/682329
Dynamic memory refresh controller utilizing array voltage Jul 16, 1996 Issued
Array ( [id] => 3790198 [patent_doc_number] => 05757712 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Memory modules with voltage regulation and level translation' [patent_app_type] => 1 [patent_app_number] => 8/678867 [patent_app_country] => US [patent_app_date] => 1996-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1595 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/757/05757712.pdf [firstpage_image] =>[orig_patent_app_number] => 678867 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/678867
Memory modules with voltage regulation and level translation Jul 11, 1996 Issued
Array ( [id] => 3712499 [patent_doc_number] => 05646884 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-07-08 [patent_title] => 'Electrical data storage device' [patent_app_type] => 1 [patent_app_number] => 8/672467 [patent_app_country] => US [patent_app_date] => 1996-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4044 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/646/05646884.pdf [firstpage_image] =>[orig_patent_app_number] => 672467 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/672467
Electrical data storage device Jun 25, 1996 Issued
Array ( [id] => 3733182 [patent_doc_number] => 05673231 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-30 [patent_title] => 'Semiconductor memory device in which leakage current from defective memory cell can be suppressed during standby' [patent_app_type] => 1 [patent_app_number] => 8/668169 [patent_app_country] => US [patent_app_date] => 1996-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 23 [patent_no_of_words] => 14755 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/673/05673231.pdf [firstpage_image] =>[orig_patent_app_number] => 668169 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/668169
Semiconductor memory device in which leakage current from defective memory cell can be suppressed during standby Jun 20, 1996 Issued
Array ( [id] => 3671682 [patent_doc_number] => 05657285 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-12 [patent_title] => 'Pipelined address memories, and systems and methods using the same' [patent_app_type] => 1 [patent_app_number] => 8/666683 [patent_app_country] => US [patent_app_date] => 1996-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4640 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/657/05657285.pdf [firstpage_image] =>[orig_patent_app_number] => 666683 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/666683
Pipelined address memories, and systems and methods using the same Jun 13, 1996 Issued
Array ( [id] => 3854054 [patent_doc_number] => 05745428 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Pipelined address memories, and systems and methods using the same' [patent_app_type] => 1 [patent_app_number] => 8/664471 [patent_app_country] => US [patent_app_date] => 1996-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4640 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745428.pdf [firstpage_image] =>[orig_patent_app_number] => 664471 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/664471
Pipelined address memories, and systems and methods using the same Jun 13, 1996 Issued
Array ( [id] => 3853847 [patent_doc_number] => 05745417 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Electrically programmable and erasable nonvolatile semiconductor memory device and operating method therefor' [patent_app_type] => 1 [patent_app_number] => 8/661930 [patent_app_country] => US [patent_app_date] => 1996-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 124 [patent_figures_cnt] => 197 [patent_no_of_words] => 43420 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745417.pdf [firstpage_image] =>[orig_patent_app_number] => 661930 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/661930
Electrically programmable and erasable nonvolatile semiconductor memory device and operating method therefor Jun 10, 1996 Issued
Array ( [id] => 3962335 [patent_doc_number] => 05999461 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Low voltage bootstrapping circuit' [patent_app_type] => 1 [patent_app_number] => 8/663032 [patent_app_country] => US [patent_app_date] => 1996-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4902 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/999/05999461.pdf [firstpage_image] =>[orig_patent_app_number] => 663032 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/663032
Low voltage bootstrapping circuit Jun 6, 1996 Issued
Array ( [id] => 3845899 [patent_doc_number] => 05815457 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-29 [patent_title] => 'Bit line selection decoder for an electronic memory' [patent_app_type] => 1 [patent_app_number] => 8/659665 [patent_app_country] => US [patent_app_date] => 1996-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 5610 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/815/05815457.pdf [firstpage_image] =>[orig_patent_app_number] => 659665 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/659665
Bit line selection decoder for an electronic memory Jun 5, 1996 Issued
Array ( [id] => 3851771 [patent_doc_number] => 05708598 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'System and method for reading multiple voltage level memories' [patent_app_type] => 1 [patent_app_number] => 8/597515 [patent_app_country] => US [patent_app_date] => 1996-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 8223 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708598.pdf [firstpage_image] =>[orig_patent_app_number] => 597515 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/597515
System and method for reading multiple voltage level memories Jun 5, 1996 Issued
Array ( [id] => 3803612 [patent_doc_number] => 05726882 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-10 [patent_title] => 'Non-volatile semiconductor memory device with verify mode for verifying data written to memory cells' [patent_app_type] => 1 [patent_app_number] => 8/659229 [patent_app_country] => US [patent_app_date] => 1996-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 130 [patent_no_of_words] => 13777 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/726/05726882.pdf [firstpage_image] =>[orig_patent_app_number] => 659229 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/659229
Non-volatile semiconductor memory device with verify mode for verifying data written to memory cells Jun 4, 1996 Issued
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