Search

Vu Anh Le

Examiner (ID: 15321, Phone: (571)272-1871 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2825, 0, 2824, 2511
Total Applications
2999
Issued Applications
2864
Pending Applications
54
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3669403 [patent_doc_number] => 05592434 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-07 [patent_title] => 'Synchronous semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/548285 [patent_app_country] => US [patent_app_date] => 1995-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 13299 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/592/05592434.pdf [firstpage_image] =>[orig_patent_app_number] => 548285 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/548285
Synchronous semiconductor memory device Oct 24, 1995 Issued
Array ( [id] => 3699127 [patent_doc_number] => 05604703 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-18 [patent_title] => 'Semiconductor memory device with error check-correction function permitting reduced read-out time' [patent_app_type] => 1 [patent_app_number] => 8/546983 [patent_app_country] => US [patent_app_date] => 1995-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4419 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/604/05604703.pdf [firstpage_image] =>[orig_patent_app_number] => 546983 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/546983
Semiconductor memory device with error check-correction function permitting reduced read-out time Oct 22, 1995 Issued
Array ( [id] => 3617959 [patent_doc_number] => 05590081 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-31 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/546982 [patent_app_country] => US [patent_app_date] => 1995-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3551 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/590/05590081.pdf [firstpage_image] =>[orig_patent_app_number] => 546982 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/546982
Semiconductor memory device Oct 22, 1995 Issued
Array ( [id] => 3644676 [patent_doc_number] => 05610862 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-11 [patent_title] => 'Pre-charged slave latch with parallel previous state memory' [patent_app_type] => 1 [patent_app_number] => 8/544097 [patent_app_country] => US [patent_app_date] => 1995-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2294 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/610/05610862.pdf [firstpage_image] =>[orig_patent_app_number] => 544097 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/544097
Pre-charged slave latch with parallel previous state memory Oct 16, 1995 Issued
Array ( [id] => 3657083 [patent_doc_number] => 05629892 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'Flash EEPROM memory with separate reference array' [patent_app_type] => 1 [patent_app_number] => 8/543684 [patent_app_country] => US [patent_app_date] => 1995-10-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 6242 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/629/05629892.pdf [firstpage_image] =>[orig_patent_app_number] => 543684 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/543684
Flash EEPROM memory with separate reference array Oct 15, 1995 Issued
Array ( [id] => 3706883 [patent_doc_number] => 05677882 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-14 [patent_title] => 'Semiconductor memory having redundancy memory decoder circuit' [patent_app_type] => 1 [patent_app_number] => 8/540981 [patent_app_country] => US [patent_app_date] => 1995-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 4528 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/677/05677882.pdf [firstpage_image] =>[orig_patent_app_number] => 540981 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/540981
Semiconductor memory having redundancy memory decoder circuit Oct 10, 1995 Issued
08/540330 TESING OF WIDE I/O SEMICONDUCTOR MEMORY DEVICES DESIGNED FOR TESTING AND REPAIR Oct 5, 1995 Abandoned
Array ( [id] => 3843665 [patent_doc_number] => 05740100 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Method for preventing polarization loss in ferroelectric capacitors by controlling imprint' [patent_app_type] => 1 [patent_app_number] => 8/539469 [patent_app_country] => US [patent_app_date] => 1995-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 18 [patent_no_of_words] => 2290 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/740/05740100.pdf [firstpage_image] =>[orig_patent_app_number] => 539469 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/539469
Method for preventing polarization loss in ferroelectric capacitors by controlling imprint Oct 4, 1995 Issued
Array ( [id] => 3629760 [patent_doc_number] => 05642325 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-24 [patent_title] => 'Register file read/write cell' [patent_app_type] => 1 [patent_app_number] => 8/534682 [patent_app_country] => US [patent_app_date] => 1995-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1419 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/642/05642325.pdf [firstpage_image] =>[orig_patent_app_number] => 534682 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/534682
Register file read/write cell Sep 26, 1995 Issued
Array ( [id] => 3666731 [patent_doc_number] => 05659500 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-19 [patent_title] => 'Nonvolatile memory array with compatible vertical source lines' [patent_app_type] => 1 [patent_app_number] => 8/533981 [patent_app_country] => US [patent_app_date] => 1995-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3690 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/659/05659500.pdf [firstpage_image] =>[orig_patent_app_number] => 533981 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/533981
Nonvolatile memory array with compatible vertical source lines Sep 25, 1995 Issued
Array ( [id] => 3622634 [patent_doc_number] => 05566117 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-15 [patent_title] => 'Reliable self-refreshing operation in a dram type of semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/532884 [patent_app_country] => US [patent_app_date] => 1995-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5203 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/566/05566117.pdf [firstpage_image] =>[orig_patent_app_number] => 532884 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/532884
Reliable self-refreshing operation in a dram type of semiconductor memory device Sep 21, 1995 Issued
Array ( [id] => 3520951 [patent_doc_number] => 05563830 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-08 [patent_title] => 'Semiconductor memory device with data bus having plurality of I/O pins and with circuitry having latching and multiplexing function' [patent_app_type] => 1 [patent_app_number] => 8/532881 [patent_app_country] => US [patent_app_date] => 1995-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3352 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 274 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/563/05563830.pdf [firstpage_image] =>[orig_patent_app_number] => 532881 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/532881
Semiconductor memory device with data bus having plurality of I/O pins and with circuitry having latching and multiplexing function Sep 21, 1995 Issued
Array ( [id] => 3601432 [patent_doc_number] => 05568431 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-22 [patent_title] => 'Memory architecture and devices, systems and methods utilizing the same' [patent_app_type] => 1 [patent_app_number] => 8/531755 [patent_app_country] => US [patent_app_date] => 1995-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 5083 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/568/05568431.pdf [firstpage_image] =>[orig_patent_app_number] => 531755 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/531755
Memory architecture and devices, systems and methods utilizing the same Sep 20, 1995 Issued
Array ( [id] => 3657210 [patent_doc_number] => 05629900 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-13 [patent_title] => 'Semiconductor memory device operable to write data accurately at high speed' [patent_app_type] => 1 [patent_app_number] => 8/526247 [patent_app_country] => US [patent_app_date] => 1995-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 119 [patent_no_of_words] => 37617 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/629/05629900.pdf [firstpage_image] =>[orig_patent_app_number] => 526247 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/526247
Semiconductor memory device operable to write data accurately at high speed Sep 10, 1995 Issued
Array ( [id] => 3666918 [patent_doc_number] => 05659513 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-19 [patent_title] => 'Static semiconductor memory device having improved characteristics' [patent_app_type] => 1 [patent_app_number] => 8/526245 [patent_app_country] => US [patent_app_date] => 1995-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 59 [patent_figures_cnt] => 119 [patent_no_of_words] => 37614 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/659/05659513.pdf [firstpage_image] =>[orig_patent_app_number] => 526245 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/526245
Static semiconductor memory device having improved characteristics Sep 10, 1995 Issued
Array ( [id] => 3507622 [patent_doc_number] => 05532963 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-02 [patent_title] => 'Semiconductor memory and screening test method thereof' [patent_app_type] => 1 [patent_app_number] => 8/523741 [patent_app_country] => US [patent_app_date] => 1995-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 33 [patent_no_of_words] => 14708 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/532/05532963.pdf [firstpage_image] =>[orig_patent_app_number] => 523741 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/523741
Semiconductor memory and screening test method thereof Sep 4, 1995 Issued
Array ( [id] => 3596582 [patent_doc_number] => 05553020 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-03 [patent_title] => 'Structure and method for low current programming of flash EEPROMs' [patent_app_type] => 1 [patent_app_number] => 8/521656 [patent_app_country] => US [patent_app_date] => 1995-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4138 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/553/05553020.pdf [firstpage_image] =>[orig_patent_app_number] => 521656 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/521656
Structure and method for low current programming of flash EEPROMs Aug 30, 1995 Issued
Array ( [id] => 3669272 [patent_doc_number] => 05592424 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-07 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 8/521585 [patent_app_country] => US [patent_app_date] => 1995-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 15621 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/592/05592424.pdf [firstpage_image] =>[orig_patent_app_number] => 521585 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/521585
Semiconductor integrated circuit device Aug 29, 1995 Issued
Array ( [id] => 3563272 [patent_doc_number] => 05574697 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-12 [patent_title] => 'Memory device with distributed voltage regulation system' [patent_app_type] => 1 [patent_app_number] => 8/515485 [patent_app_country] => US [patent_app_date] => 1995-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3518 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/574/05574697.pdf [firstpage_image] =>[orig_patent_app_number] => 515485 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/515485
Memory device with distributed voltage regulation system Aug 14, 1995 Issued
Array ( [id] => 3715783 [patent_doc_number] => 05654916 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-05 [patent_title] => 'Semiconductor memory device having an improved sense amplifier arrangement' [patent_app_type] => 1 [patent_app_number] => 8/510465 [patent_app_country] => US [patent_app_date] => 1995-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 30 [patent_no_of_words] => 11693 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 290 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/654/05654916.pdf [firstpage_image] =>[orig_patent_app_number] => 510465 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/510465
Semiconductor memory device having an improved sense amplifier arrangement Aug 1, 1995 Issued
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