
Vu Anh Le
Examiner (ID: 15321, Phone: (571)272-1871 , Office: P/2825 )
| Most Active Art Unit | 2824 |
| Art Unit(s) | 2818, 2825, 0, 2824, 2511 |
| Total Applications | 2999 |
| Issued Applications | 2864 |
| Pending Applications | 54 |
| Abandoned Applications | 89 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3664450
[patent_doc_number] => 05623442
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-22
[patent_title] => 'Memory cells and memory devices with a storage capacitor of parasitic capacitance and information storing method using the same'
[patent_app_type] => 1
[patent_app_number] => 8/379480
[patent_app_country] => US
[patent_app_date] => 1995-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 30
[patent_no_of_words] => 13942
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 8
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/623/05623442.pdf
[firstpage_image] =>[orig_patent_app_number] => 379480
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/379480 | Memory cells and memory devices with a storage capacitor of parasitic capacitance and information storing method using the same | Jan 30, 1995 | Issued |
Array
(
[id] => 3597832
[patent_doc_number] => 05550781
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-08-27
[patent_title] => 'Semiconductor apparatus with two activating modes of different number of selected word lines at refreshing'
[patent_app_type] => 1
[patent_app_number] => 8/381648
[patent_app_country] => US
[patent_app_date] => 1995-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 31
[patent_no_of_words] => 16778
[patent_no_of_claims] => 12
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/550/05550781.pdf
[firstpage_image] =>[orig_patent_app_number] => 381648
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/381648 | Semiconductor apparatus with two activating modes of different number of selected word lines at refreshing | Jan 30, 1995 | Issued |
Array
(
[id] => 3590219
[patent_doc_number] => 05499205
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-03-12
[patent_title] => 'Bit line structure'
[patent_app_type] => 1
[patent_app_number] => 8/380757
[patent_app_country] => US
[patent_app_date] => 1995-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 2281
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/499/05499205.pdf
[firstpage_image] =>[orig_patent_app_number] => 380757
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/380757 | Bit line structure | Jan 30, 1995 | Issued |
Array
(
[id] => 3698009
[patent_doc_number] => 05644555
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-01
[patent_title] => 'Multiple data surface magneto-optical data storage system'
[patent_app_type] => 1
[patent_app_number] => 8/376943
[patent_app_country] => US
[patent_app_date] => 1995-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 4958
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/644/05644555.pdf
[firstpage_image] =>[orig_patent_app_number] => 376943
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/376943 | Multiple data surface magneto-optical data storage system | Jan 18, 1995 | Issued |
Array
(
[id] => 3519604
[patent_doc_number] => 05587991
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-24
[patent_title] => 'Recording medium, signal recording apparatus thereof, and signal reproducing apparatus thereof'
[patent_app_type] => 1
[patent_app_number] => 8/375428
[patent_app_country] => US
[patent_app_date] => 1995-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 6301
[patent_no_of_claims] => 7
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[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/587/05587991.pdf
[firstpage_image] =>[orig_patent_app_number] => 375428
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/375428 | Recording medium, signal recording apparatus thereof, and signal reproducing apparatus thereof | Jan 17, 1995 | Issued |
Array
(
[id] => 3525409
[patent_doc_number] => 05487044
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-23
[patent_title] => 'Semiconductor memory device having bit line equalizing means'
[patent_app_type] => 1
[patent_app_number] => 8/372906
[patent_app_country] => US
[patent_app_date] => 1995-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 15
[patent_no_of_words] => 6126
[patent_no_of_claims] => 38
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/487/05487044.pdf
[firstpage_image] =>[orig_patent_app_number] => 372906
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/372906 | Semiconductor memory device having bit line equalizing means | Jan 16, 1995 | Issued |
Array
(
[id] => 3499478
[patent_doc_number] => 05508604
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-16
[patent_title] => 'Low voltage regulator with summing circuit'
[patent_app_type] => 1
[patent_app_number] => 8/372275
[patent_app_country] => US
[patent_app_date] => 1995-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4144
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/508/05508604.pdf
[firstpage_image] =>[orig_patent_app_number] => 372275
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/372275 | Low voltage regulator with summing circuit | Jan 10, 1995 | Issued |
Array
(
[id] => 3678508
[patent_doc_number] => 05600601
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-02-04
[patent_title] => 'Semiconductor memory device with reduced consumption power for bit line precharge'
[patent_app_type] => 1
[patent_app_number] => 8/364985
[patent_app_country] => US
[patent_app_date] => 1994-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 6527
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 327
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/600/05600601.pdf
[firstpage_image] =>[orig_patent_app_number] => 364985
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/364985 | Semiconductor memory device with reduced consumption power for bit line precharge | Dec 27, 1994 | Issued |
Array
(
[id] => 3438068
[patent_doc_number] => 05463577
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-31
[patent_title] => 'Semiconductor memory'
[patent_app_type] => 1
[patent_app_number] => 8/365104
[patent_app_country] => US
[patent_app_date] => 1994-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 5400
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 2
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/463/05463577.pdf
[firstpage_image] =>[orig_patent_app_number] => 365104
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/365104 | Semiconductor memory | Dec 27, 1994 | Issued |
Array
(
[id] => 3434901
[patent_doc_number] => 05455641
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-10-03
[patent_title] => 'Soft contact lens having toric rear face and rotationally symmetrical front face'
[patent_app_type] => 1
[patent_app_number] => 8/361896
[patent_app_country] => US
[patent_app_date] => 1994-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2042
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/455/05455641.pdf
[firstpage_image] =>[orig_patent_app_number] => 361896
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/361896 | Soft contact lens having toric rear face and rotationally symmetrical front face | Dec 21, 1994 | Issued |
Array
(
[id] => 3600309
[patent_doc_number] => 05586073
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-17
[patent_title] => 'Semiconductor device having a multi-layer channel structure'
[patent_app_type] => 1
[patent_app_number] => 8/361505
[patent_app_country] => US
[patent_app_date] => 1994-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 28
[patent_no_of_words] => 9845
[patent_no_of_claims] => 89
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/586/05586073.pdf
[firstpage_image] =>[orig_patent_app_number] => 361505
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/361505 | Semiconductor device having a multi-layer channel structure | Dec 21, 1994 | Issued |
Array
(
[id] => 3624120
[patent_doc_number] => 05511025
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-04-23
[patent_title] => 'Write per bit with write mask information carried on the data path past the input data latch'
[patent_app_type] => 1
[patent_app_number] => 8/361901
[patent_app_country] => US
[patent_app_date] => 1994-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 6
[patent_no_of_words] => 3468
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/511/05511025.pdf
[firstpage_image] =>[orig_patent_app_number] => 361901
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/361901 | Write per bit with write mask information carried on the data path past the input data latch | Dec 20, 1994 | Issued |
Array
(
[id] => 3602758
[patent_doc_number] => 05521860
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-28
[patent_title] => 'CMOS static memory'
[patent_app_type] => 1
[patent_app_number] => 8/358017
[patent_app_country] => US
[patent_app_date] => 1994-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 3184
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/521/05521860.pdf
[firstpage_image] =>[orig_patent_app_number] => 358017
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/358017 | CMOS static memory | Dec 15, 1994 | Issued |
Array
(
[id] => 3618219
[patent_doc_number] => 05590097
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-31
[patent_title] => 'Magnetooptic recording medium'
[patent_app_type] => 1
[patent_app_number] => 8/356547
[patent_app_country] => US
[patent_app_date] => 1994-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 5142
[patent_no_of_claims] => 11
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/590/05590097.pdf
[firstpage_image] =>[orig_patent_app_number] => 356547
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/356547 | Magnetooptic recording medium | Dec 14, 1994 | Issued |
Array
(
[id] => 3558211
[patent_doc_number] => 05555520
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-10
[patent_title] => 'Trench capacitor cells for a dram having single monocrystalline capacitor electrode'
[patent_app_type] => 1
[patent_app_number] => 8/353368
[patent_app_country] => US
[patent_app_date] => 1994-12-02
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/555/05555520.pdf
[firstpage_image] =>[orig_patent_app_number] => 353368
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/353368 | Trench capacitor cells for a dram having single monocrystalline capacitor electrode | Dec 1, 1994 | Issued |
Array
(
[id] => 3588244
[patent_doc_number] => 05491663
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-02-13
[patent_title] => 'Pre-charged slave latch with parallel previous state memory'
[patent_app_type] => 1
[patent_app_number] => 8/346748
[patent_app_country] => US
[patent_app_date] => 1994-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 2289
[patent_no_of_claims] => 24
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/491/05491663.pdf
[firstpage_image] =>[orig_patent_app_number] => 346748
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/346748 | Pre-charged slave latch with parallel previous state memory | Nov 29, 1994 | Issued |
| 08/347267 | INTEGRATED CIRCUIT FOR THE PROGRAMMING OF A MEMORY CELL IN A NON-VOLATILE MEMORY REGISTER | Nov 29, 1994 | Abandoned |
Array
(
[id] => 3623294
[patent_doc_number] => 05535158
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-09
[patent_title] => 'Non-volatile semiconductor memory device and method for erasure and production thereof'
[patent_app_type] => 1
[patent_app_number] => 8/350978
[patent_app_country] => US
[patent_app_date] => 1994-11-29
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/535/05535158.pdf
[firstpage_image] =>[orig_patent_app_number] => 350978
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/350978 | Non-volatile semiconductor memory device and method for erasure and production thereof | Nov 28, 1994 | Issued |
Array
(
[id] => 3601386
[patent_doc_number] => 05568428
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-10-22
[patent_title] => 'Memory device and serial-parallel data transform circuit'
[patent_app_type] => 1
[patent_app_number] => 8/346080
[patent_app_country] => US
[patent_app_date] => 1994-11-29
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[pdf_file] => patents/05/568/05568428.pdf
[firstpage_image] =>[orig_patent_app_number] => 346080
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/346080 | Memory device and serial-parallel data transform circuit | Nov 28, 1994 | Issued |
| 08/346179 | DUAL PORT MEMORY APPARATUS | Nov 21, 1994 | Abandoned |