Search

Vu Anh Le

Examiner (ID: 15321, Phone: (571)272-1871 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2825, 0, 2824, 2511
Total Applications
2999
Issued Applications
2864
Pending Applications
54
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3425586 [patent_doc_number] => 05394371 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-02-28 [patent_title] => 'Semiconductor memory device with shared sense amplifiers' [patent_app_type] => 1 [patent_app_number] => 8/163399 [patent_app_country] => US [patent_app_date] => 1993-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4050 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/394/05394371.pdf [firstpage_image] =>[orig_patent_app_number] => 163399 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/163399
Semiconductor memory device with shared sense amplifiers Dec 6, 1993 Issued
08/161426 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR DRIVING THE SAME Dec 5, 1993 Abandoned
Array ( [id] => 3009022 [patent_doc_number] => 05359552 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-10-25 [patent_title] => 'Power supply tracking regulator for a memory array' [patent_app_type] => 1 [patent_app_number] => 8/163337 [patent_app_country] => US [patent_app_date] => 1993-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4538 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/359/05359552.pdf [firstpage_image] =>[orig_patent_app_number] => 163337 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/163337
Power supply tracking regulator for a memory array Dec 5, 1993 Issued
Array ( [id] => 3507549 [patent_doc_number] => 05532958 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-02 [patent_title] => 'Dual storage cell memory' [patent_app_type] => 1 [patent_app_number] => 8/135722 [patent_app_country] => US [patent_app_date] => 1993-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3260 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 338 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/532/05532958.pdf [firstpage_image] =>[orig_patent_app_number] => 135722 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/135722
Dual storage cell memory Nov 23, 1993 Issued
Array ( [id] => 3433030 [patent_doc_number] => 05422853 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-06 [patent_title] => 'Sense amplifier control circuit for semiconductor memory' [patent_app_type] => 1 [patent_app_number] => 8/156360 [patent_app_country] => US [patent_app_date] => 1993-11-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3626 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/422/05422853.pdf [firstpage_image] =>[orig_patent_app_number] => 156360 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/156360
Sense amplifier control circuit for semiconductor memory Nov 22, 1993 Issued
Array ( [id] => 3574274 [patent_doc_number] => 05483485 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-09 [patent_title] => 'Nonvolatile semiconductor system with automatic over erase protection' [patent_app_type] => 1 [patent_app_number] => 8/150051 [patent_app_country] => US [patent_app_date] => 1993-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6539 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/483/05483485.pdf [firstpage_image] =>[orig_patent_app_number] => 150051 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/150051
Nonvolatile semiconductor system with automatic over erase protection Nov 17, 1993 Issued
Array ( [id] => 3464209 [patent_doc_number] => 05452259 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-19 [patent_title] => 'Multiport memory with pipelined serial input' [patent_app_type] => 1 [patent_app_number] => 8/153120 [patent_app_country] => US [patent_app_date] => 1993-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7031 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/452/05452259.pdf [firstpage_image] =>[orig_patent_app_number] => 153120 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/153120
Multiport memory with pipelined serial input Nov 14, 1993 Issued
Array ( [id] => 3753119 [patent_doc_number] => 05754465 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-19 [patent_title] => 'No physical movement component record reproduce device and flat display device' [patent_app_type] => 1 [patent_app_number] => 8/151180 [patent_app_country] => US [patent_app_date] => 1993-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 4310 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/754/05754465.pdf [firstpage_image] =>[orig_patent_app_number] => 151180 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/151180
No physical movement component record reproduce device and flat display device Nov 11, 1993 Issued
Array ( [id] => 3499378 [patent_doc_number] => 05471457 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-11-28 [patent_title] => 'Methods and devices for recording one or more signals which have been encoded by on error detection and correction algorithm on a record carrier by means of an optimal recording intensity' [patent_app_type] => 1 [patent_app_number] => 8/148781 [patent_app_country] => US [patent_app_date] => 1993-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 5234 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/471/05471457.pdf [firstpage_image] =>[orig_patent_app_number] => 148781 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/148781
Methods and devices for recording one or more signals which have been encoded by on error detection and correction algorithm on a record carrier by means of an optimal recording intensity Nov 4, 1993 Issued
08/138571 WRITE PER BIT WITH WRITE MASK INFORMATION CARRIED ON THE DATA PATH PAST THE INPUT DATA LATCH Oct 17, 1993 Abandoned
Array ( [id] => 3501016 [patent_doc_number] => 05561635 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-01 [patent_title] => 'PROM IC enabling a stricter memory cell margin test' [patent_app_type] => 1 [patent_app_number] => 8/135178 [patent_app_country] => US [patent_app_date] => 1993-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3095 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/561/05561635.pdf [firstpage_image] =>[orig_patent_app_number] => 135178 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/135178
PROM IC enabling a stricter memory cell margin test Oct 11, 1993 Issued
08/133498 METHOD AND APPARATUS USING MAPPED REDUNDANCY TO PERFORM MULTIPLE LARGE BLOCK MEMORY ARRAY REPAIR Oct 7, 1993 Abandoned
Array ( [id] => 3428023 [patent_doc_number] => 05434820 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-07-18 [patent_title] => 'Back bias voltage generator circuit of a semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/134040 [patent_app_country] => US [patent_app_date] => 1993-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2942 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/434/05434820.pdf [firstpage_image] =>[orig_patent_app_number] => 134040 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/134040
Back bias voltage generator circuit of a semiconductor memory device Oct 7, 1993 Issued
Array ( [id] => 3435797 [patent_doc_number] => 05416748 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-16 [patent_title] => 'Semiconductor memory device having dual word line structure' [patent_app_type] => 1 [patent_app_number] => 8/132343 [patent_app_country] => US [patent_app_date] => 1993-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2410 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/416/05416748.pdf [firstpage_image] =>[orig_patent_app_number] => 132343 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/132343
Semiconductor memory device having dual word line structure Oct 5, 1993 Issued
Array ( [id] => 3432822 [patent_doc_number] => 05422839 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-06 [patent_title] => 'Semiconductor memory device' [patent_app_type] => 1 [patent_app_number] => 8/118645 [patent_app_country] => US [patent_app_date] => 1993-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 5700 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/422/05422839.pdf [firstpage_image] =>[orig_patent_app_number] => 118645 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/118645
Semiconductor memory device Sep 9, 1993 Issued
Array ( [id] => 3466561 [patent_doc_number] => 05402370 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-03-28 [patent_title] => 'Circuitry and method for selecting a drain programming voltage for a nonvolatile memory' [patent_app_type] => 1 [patent_app_number] => 8/119738 [patent_app_country] => US [patent_app_date] => 1993-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7297 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/402/05402370.pdf [firstpage_image] =>[orig_patent_app_number] => 119738 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/119738
Circuitry and method for selecting a drain programming voltage for a nonvolatile memory Sep 9, 1993 Issued
Array ( [id] => 3483667 [patent_doc_number] => 05428577 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-06-27 [patent_title] => 'Semiconductor storage device having word-line voltage booster circuit with decoder and charger' [patent_app_type] => 1 [patent_app_number] => 8/117773 [patent_app_country] => US [patent_app_date] => 1993-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 3531 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/428/05428577.pdf [firstpage_image] =>[orig_patent_app_number] => 117773 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/117773
Semiconductor storage device having word-line voltage booster circuit with decoder and charger Sep 7, 1993 Issued
Array ( [id] => 3049343 [patent_doc_number] => 05377137 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-27 [patent_title] => 'Read-protected semiconductor program memory' [patent_app_type] => 1 [patent_app_number] => 8/117761 [patent_app_country] => US [patent_app_date] => 1993-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2959 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/377/05377137.pdf [firstpage_image] =>[orig_patent_app_number] => 117761 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/117761
Read-protected semiconductor program memory Sep 7, 1993 Issued
Array ( [id] => 3130680 [patent_doc_number] => 05381371 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-10 [patent_title] => 'Semiconductor memory device incorporating redundancy memory cells capable of accessing defective memory cells' [patent_app_type] => 1 [patent_app_number] => 8/116673 [patent_app_country] => US [patent_app_date] => 1993-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 2487 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/381/05381371.pdf [firstpage_image] =>[orig_patent_app_number] => 116673 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/116673
Semiconductor memory device incorporating redundancy memory cells capable of accessing defective memory cells Sep 6, 1993 Issued
Array ( [id] => 3635182 [patent_doc_number] => 05608676 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-03-04 [patent_title] => 'Current limited current reference for non-volatile memory sensing' [patent_app_type] => 1 [patent_app_number] => 8/114478 [patent_app_country] => US [patent_app_date] => 1993-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4389 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/608/05608676.pdf [firstpage_image] =>[orig_patent_app_number] => 114478 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/114478
Current limited current reference for non-volatile memory sensing Aug 30, 1993 Issued
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