
Vu Anh Le
Examiner (ID: 5206, Phone: (571)272-1871 , Office: P/2825 )
| Most Active Art Unit | 2824 |
| Art Unit(s) | 0, 2818, 2511, 2825, 2824 |
| Total Applications | 2999 |
| Issued Applications | 2864 |
| Pending Applications | 54 |
| Abandoned Applications | 89 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11233535
[patent_doc_number] => 09460766
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-10-04
[patent_title] => 'Memory device, and memory system including the same'
[patent_app_type] => utility
[patent_app_number] => 14/801707
[patent_app_country] => US
[patent_app_date] => 2015-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 11178
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14801707
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/801707 | Memory device, and memory system including the same | Jul 15, 2015 | Issued |
Array
(
[id] => 10433027
[patent_doc_number] => 20150318040
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-11-05
[patent_title] => 'JOINT SHORT-TIME AND LONG-TIME STORAGE DEVICE AND STORAGE METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 14/800693
[patent_app_country] => US
[patent_app_date] => 2015-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4588
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14800693
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/800693 | Joint short-time and long-time storage device and storage method thereof | Jul 14, 2015 | Issued |
Array
(
[id] => 10447739
[patent_doc_number] => 20150332753
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-11-19
[patent_title] => 'MULTI-DIE MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/797057
[patent_app_country] => US
[patent_app_date] => 2015-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 18606
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14797057
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/797057 | Multi-die memory device | Jul 9, 2015 | Issued |
Array
(
[id] => 11452995
[patent_doc_number] => 09576644
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-02-21
[patent_title] => 'Integrated circuit chip having two types of memory cells'
[patent_app_type] => utility
[patent_app_number] => 14/792865
[patent_app_country] => US
[patent_app_date] => 2015-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 24
[patent_no_of_words] => 12287
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14792865
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/792865 | Integrated circuit chip having two types of memory cells | Jul 6, 2015 | Issued |
Array
(
[id] => 11764981
[patent_doc_number] => 09373422
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-06-21
[patent_title] => 'Memory device'
[patent_app_type] => utility
[patent_app_number] => 14/793483
[patent_app_country] => US
[patent_app_date] => 2015-07-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 10044
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14793483
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/793483 | Memory device | Jul 6, 2015 | Issued |
Array
(
[id] => 10747247
[patent_doc_number] => 20160093398
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-03-31
[patent_title] => 'MEMORY DEVICE INCLUDING NONVOLATILE MEMORY CELL'
[patent_app_type] => utility
[patent_app_number] => 14/753620
[patent_app_country] => US
[patent_app_date] => 2015-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 12354
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14753620
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/753620 | Memory device including nonvolatile memory cell | Jun 28, 2015 | Issued |
Array
(
[id] => 11791543
[patent_doc_number] => 09401184
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-07-26
[patent_title] => 'Memory system and method for power management'
[patent_app_type] => utility
[patent_app_number] => 14/741075
[patent_app_country] => US
[patent_app_date] => 2015-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 18
[patent_no_of_words] => 11618
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14741075
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/741075 | Memory system and method for power management | Jun 15, 2015 | Issued |
Array
(
[id] => 11770095
[patent_doc_number] => 09378780
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-06-28
[patent_title] => 'Sense amplifier'
[patent_app_type] => utility
[patent_app_number] => 14/740290
[patent_app_country] => US
[patent_app_date] => 2015-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 5076
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14740290
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/740290 | Sense amplifier | Jun 15, 2015 | Issued |
Array
(
[id] => 11020879
[patent_doc_number] => 20160217833
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-07-28
[patent_title] => 'SENSE AMPLIFIER AND SEMICONDUCTOR DEVICE INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/731759
[patent_app_country] => US
[patent_app_date] => 2015-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8112
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14731759
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/731759 | Sense amplifier and semiconductor device including the same | Jun 4, 2015 | Issued |
Array
(
[id] => 11328031
[patent_doc_number] => 20160358643
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-08
[patent_title] => 'READ AND WRITE APPARATUS AND METHOD FOR A DUAL PORT MEMORY'
[patent_app_type] => utility
[patent_app_number] => 14/731319
[patent_app_country] => US
[patent_app_date] => 2015-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 9770
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14731319
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/731319 | Read and write apparatus and method for a dual port memory | Jun 3, 2015 | Issued |
Array
(
[id] => 10617403
[patent_doc_number] => 09336849
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-10
[patent_title] => 'Memory device with shared read/write circuitry'
[patent_app_type] => utility
[patent_app_number] => 14/727981
[patent_app_country] => US
[patent_app_date] => 2015-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 11081
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14727981
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/727981 | Memory device with shared read/write circuitry | Jun 1, 2015 | Issued |
Array
(
[id] => 10603859
[patent_doc_number] => 09324428
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-04-26
[patent_title] => 'Memory device and operation method thereof'
[patent_app_type] => utility
[patent_app_number] => 14/727953
[patent_app_country] => US
[patent_app_date] => 2015-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3587
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14727953
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/727953 | Memory device and operation method thereof | Jun 1, 2015 | Issued |
Array
(
[id] => 10617402
[patent_doc_number] => 09336848
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-10
[patent_title] => 'Memory device with differential bit cells'
[patent_app_type] => utility
[patent_app_number] => 14/727965
[patent_app_country] => US
[patent_app_date] => 2015-06-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 11081
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 109
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14727965
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/727965 | Memory device with differential bit cells | Jun 1, 2015 | Issued |
Array
(
[id] => 11764930
[patent_doc_number] => 09373368
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-06-21
[patent_title] => 'Semiconductor device and electronic device'
[patent_app_type] => utility
[patent_app_number] => 14/725109
[patent_app_country] => US
[patent_app_date] => 2015-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 36
[patent_no_of_words] => 24945
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 264
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14725109
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/725109 | Semiconductor device and electronic device | May 28, 2015 | Issued |
Array
(
[id] => 11005763
[patent_doc_number] => 20160202713
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-07-14
[patent_title] => 'CIRCUIT DRIVING METHOD AND DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/722192
[patent_app_country] => US
[patent_app_date] => 2015-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3680
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14722192
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/722192 | Circuit driving method and device | May 26, 2015 | Issued |
Array
(
[id] => 10370162
[patent_doc_number] => 20150255167
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-09-10
[patent_title] => 'CLOCK MODE DETERMINATION IN A MEMORY SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 14/720317
[patent_app_country] => US
[patent_app_date] => 2015-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 14082
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14720317
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/720317 | Clock mode determination in a memory system | May 21, 2015 | Issued |
Array
(
[id] => 10364087
[patent_doc_number] => 20150249092
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-09-03
[patent_title] => 'MEMORY ARRAYS WITH A MEMORY CELL ADJACENT TO A SMALLER SIZE OF A PILLAR HAVING A GREATER CHANNEL LENGTH THAN A MEMORY CELL ADJACENT TO A LARGER SIZE OF THE PILLAR AND METHODS'
[patent_app_type] => utility
[patent_app_number] => 14/710976
[patent_app_country] => US
[patent_app_date] => 2015-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 14
[patent_no_of_words] => 10284
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14710976
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/710976 | Memory arrays with a memory cell adjacent to a smaller size of a pillar having a greater channel length than a memory cell adjacent to a larger size of the pillar and methods | May 12, 2015 | Issued |
Array
(
[id] => 11286266
[patent_doc_number] => 09502123
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-11-22
[patent_title] => 'Adaptive block parameters'
[patent_app_type] => utility
[patent_app_number] => 14/692564
[patent_app_country] => US
[patent_app_date] => 2015-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 22
[patent_no_of_words] => 9623
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14692564
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/692564 | Adaptive block parameters | Apr 20, 2015 | Issued |
Array
(
[id] => 11110658
[patent_doc_number] => 20160307627
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-20
[patent_title] => 'METHOD FOR PROGRAMMING MEMORY DEVICE AND ASSOCIATED MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/687998
[patent_app_country] => US
[patent_app_date] => 2015-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3854
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14687998
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/687998 | Method for programming memory device and associated memory device | Apr 15, 2015 | Issued |
Array
(
[id] => 10502291
[patent_doc_number] => 09230693
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-01-05
[patent_title] => 'Repair circuit and semiconductor memory device including the same'
[patent_app_type] => utility
[patent_app_number] => 14/688789
[patent_app_country] => US
[patent_app_date] => 2015-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5144
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14688789
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/688789 | Repair circuit and semiconductor memory device including the same | Apr 15, 2015 | Issued |