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Vu Anh Le

Examiner (ID: 15321, Phone: (571)272-1871 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2825, 0, 2824, 2511
Total Applications
2999
Issued Applications
2864
Pending Applications
54
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1000769 [patent_doc_number] => 06912167 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-28 [patent_title] => 'Sensing circuit' [patent_app_type] => utility [patent_app_number] => 10/602739 [patent_app_country] => US [patent_app_date] => 2003-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5841 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/912/06912167.pdf [firstpage_image] =>[orig_patent_app_number] => 10602739 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/602739
Sensing circuit Jun 24, 2003 Issued
Array ( [id] => 7360448 [patent_doc_number] => 20040004892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'Circuit configuration for driving a programmable link' [patent_app_type] => new [patent_app_number] => 10/601236 [patent_app_country] => US [patent_app_date] => 2003-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4568 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20040004892.pdf [firstpage_image] =>[orig_patent_app_number] => 10601236 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/601236
Circuit configuration for driving a programmable link Jun 19, 2003 Issued
Array ( [id] => 7325227 [patent_doc_number] => 20040252555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-16 [patent_title] => 'Fast discharge for program and verification' [patent_app_type] => new [patent_app_number] => 10/461437 [patent_app_country] => US [patent_app_date] => 2003-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7311 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0252/20040252555.pdf [firstpage_image] =>[orig_patent_app_number] => 10461437 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/461437
Fast discharge for program and verification Jun 15, 2003 Issued
Array ( [id] => 1099311 [patent_doc_number] => 06822914 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-23 [patent_title] => 'Circuits and methods for generating high frequency extended test pattern data from low frequency test pattern data input to an integrated circuit memory device' [patent_app_type] => B2 [patent_app_number] => 10/459741 [patent_app_country] => US [patent_app_date] => 2003-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3379 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/822/06822914.pdf [firstpage_image] =>[orig_patent_app_number] => 10459741 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/459741
Circuits and methods for generating high frequency extended test pattern data from low frequency test pattern data input to an integrated circuit memory device Jun 11, 2003 Issued
Array ( [id] => 7287844 [patent_doc_number] => 20040109339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'MRAM memories utilizing magnetic write lines' [patent_app_type] => new [patent_app_number] => 10/459133 [patent_app_country] => US [patent_app_date] => 2003-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6779 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20040109339.pdf [firstpage_image] =>[orig_patent_app_number] => 10459133 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/459133
MRAM memories utilizing magnetic write lines Jun 10, 2003 Issued
Array ( [id] => 6622231 [patent_doc_number] => 20030210569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'Semiconductor memory device and memory system' [patent_app_type] => new [patent_app_number] => 10/457416 [patent_app_country] => US [patent_app_date] => 2003-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4997 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20030210569.pdf [firstpage_image] =>[orig_patent_app_number] => 10457416 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/457416
Semiconductor memory device and memory system Jun 9, 2003 Issued
Array ( [id] => 6724161 [patent_doc_number] => 20030206473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-06 [patent_title] => 'Method and system for performing equipotential sensing across a memory array to eliminate leakage currents' [patent_app_type] => new [patent_app_number] => 10/459437 [patent_app_country] => US [patent_app_date] => 2003-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4523 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0206/20030206473.pdf [firstpage_image] =>[orig_patent_app_number] => 10459437 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/459437
Method and system for performing equipotential sensing across a memory array to eliminate leakage currents Jun 9, 2003 Issued
Array ( [id] => 7352468 [patent_doc_number] => 20040013018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-22 [patent_title] => 'Non-volatile semiconductor memory device and method of actuating the same' [patent_app_type] => new [patent_app_number] => 10/446827 [patent_app_country] => US [patent_app_date] => 2003-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13455 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0013/20040013018.pdf [firstpage_image] =>[orig_patent_app_number] => 10446827 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/446827
Non-volatile semiconductor memory device and method of actuating the same May 28, 2003 Issued
Array ( [id] => 7131817 [patent_doc_number] => 20040042278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Prefetch buffer' [patent_app_type] => new [patent_app_number] => 10/444933 [patent_app_country] => US [patent_app_date] => 2003-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4685 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0042/20040042278.pdf [firstpage_image] =>[orig_patent_app_number] => 10444933 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/444933
Prefetch buffer May 22, 2003 Issued
Array ( [id] => 1174258 [patent_doc_number] => 06757214 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-29 [patent_title] => 'Synchronous type semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/443439 [patent_app_country] => US [patent_app_date] => 2003-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4178 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/757/06757214.pdf [firstpage_image] =>[orig_patent_app_number] => 10443439 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/443439
Synchronous type semiconductor memory device May 21, 2003 Issued
Array ( [id] => 6622570 [patent_doc_number] => 20030210599 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-11-13 [patent_title] => 'Integrated volatile and non-volatile memory' [patent_app_type] => new [patent_app_number] => 10/442844 [patent_app_country] => US [patent_app_date] => 2003-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4290 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20030210599.pdf [firstpage_image] =>[orig_patent_app_number] => 10442844 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/442844
Integrated volatile and non-volatile memory May 19, 2003 Issued
Array ( [id] => 1140252 [patent_doc_number] => 06785190 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-31 [patent_title] => 'Method for opening pages of memory with a single command' [patent_app_type] => B1 [patent_app_number] => 10/442335 [patent_app_country] => US [patent_app_date] => 2003-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2184 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/785/06785190.pdf [firstpage_image] =>[orig_patent_app_number] => 10442335 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/442335
Method for opening pages of memory with a single command May 19, 2003 Issued
Array ( [id] => 507300 [patent_doc_number] => 07206220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-17 [patent_title] => 'MRAM-cell and array-architecture with maximum read-out signal and reduced electromagnetic interference' [patent_app_type] => utility [patent_app_number] => 10/515475 [patent_app_country] => US [patent_app_date] => 2003-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 8112 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/206/07206220.pdf [firstpage_image] =>[orig_patent_app_number] => 10515475 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/515475
MRAM-cell and array-architecture with maximum read-out signal and reduced electromagnetic interference May 18, 2003 Issued
Array ( [id] => 670065 [patent_doc_number] => 07095648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-22 [patent_title] => 'Magnetoresistive memory cell array and MRAM memory comprising such array' [patent_app_type] => utility [patent_app_number] => 10/515155 [patent_app_country] => US [patent_app_date] => 2003-05-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5014 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/095/07095648.pdf [firstpage_image] =>[orig_patent_app_number] => 10515155 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/515155
Magnetoresistive memory cell array and MRAM memory comprising such array May 15, 2003 Issued
Array ( [id] => 7392675 [patent_doc_number] => 20040017722 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-29 [patent_title] => 'Page-erasable flash memory' [patent_app_type] => new [patent_app_number] => 10/438733 [patent_app_country] => US [patent_app_date] => 2003-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9930 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20040017722.pdf [firstpage_image] =>[orig_patent_app_number] => 10438733 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/438733
Page-erasable flash memory May 14, 2003 Issued
Array ( [id] => 7360465 [patent_doc_number] => 20040004897 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-08 [patent_title] => 'Layout structures of data input/output pads and peripheral circuits of integrated circuit memory devices' [patent_app_type] => new [patent_app_number] => 10/438535 [patent_app_country] => US [patent_app_date] => 2003-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3204 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20040004897.pdf [firstpage_image] =>[orig_patent_app_number] => 10438535 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/438535
Layout structures of data input/output pads and peripheral circuits of integrated circuit memory devices May 14, 2003 Issued
Array ( [id] => 1164345 [patent_doc_number] => 06762954 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-07-13 [patent_title] => 'Local probe of magnetic properties' [patent_app_type] => B1 [patent_app_number] => 10/434337 [patent_app_country] => US [patent_app_date] => 2003-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3250 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/762/06762954.pdf [firstpage_image] =>[orig_patent_app_number] => 10434337 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/434337
Local probe of magnetic properties May 8, 2003 Issued
Array ( [id] => 6663052 [patent_doc_number] => 20030202378 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-30 [patent_title] => 'Electrically alterable non-volatile memory with n-bits per cell' [patent_app_type] => new [patent_app_number] => 10/428732 [patent_app_country] => US [patent_app_date] => 2003-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7258 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 405 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20030202378.pdf [firstpage_image] =>[orig_patent_app_number] => 10428732 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/428732
Electrically alterable non-volatile memory with n-bits per cell May 4, 2003 Issued
Array ( [id] => 6677663 [patent_doc_number] => 20030227803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-11 [patent_title] => 'Ferroelectric memory device and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/426635 [patent_app_country] => US [patent_app_date] => 2003-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 9922 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20030227803.pdf [firstpage_image] =>[orig_patent_app_number] => 10426635 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/426635
Ferroelectric memory device and method of manufacturing the same Apr 30, 2003 Issued
Array ( [id] => 7433969 [patent_doc_number] => 20040008558 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Refresh control circuit and methods of operation and control of the refresh control circuit' [patent_app_type] => new [patent_app_number] => 10/421739 [patent_app_country] => US [patent_app_date] => 2003-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3366 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20040008558.pdf [firstpage_image] =>[orig_patent_app_number] => 10421739 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/421739
Refresh control circuit and methods of operation and control of the refresh control circuit Apr 23, 2003 Issued
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