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Array ( [id] => 1057980 [patent_doc_number] => 06856573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-15 [patent_title] => 'Column decoder configuration for a 1T/1C memory' [patent_app_type] => utility [patent_app_number] => 10/389276 [patent_app_country] => US [patent_app_date] => 2003-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 53 [patent_no_of_words] => 19395 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/856/06856573.pdf [firstpage_image] =>[orig_patent_app_number] => 10389276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7454233 [patent_doc_number] => 20040052108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'THIN FILM MAGNETIC MEMORY DEVICE SUPPRESSING RESISTANCE OF TRANSISTORS PRESENT IN CURRENT PATH' [patent_app_type] => new [patent_app_number] => 10/384741 [patent_app_country] => US [patent_app_date] => 2003-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9301 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20040052108.pdf [firstpage_image] =>[orig_patent_app_number] => 10384741 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6677660 [patent_doc_number] => 20030227800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-12-11 [patent_title] => 'Semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/383633 [patent_app_country] => US [patent_app_date] => 2003-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5189 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20030227800.pdf [firstpage_image] =>[orig_patent_app_number] => 10383633 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 621694 [patent_doc_number] => 07142461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-28 [patent_title] => 'Active termination control though on module register' [patent_app_type] => utility [patent_app_number] => 10/383939 [patent_app_country] => US [patent_app_date] => 2003-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 9054 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/142/07142461.pdf [firstpage_image] =>[orig_patent_app_number] => 10383939 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1122874 [patent_doc_number] => 06798698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/377674 [patent_app_country] => US [patent_app_date] => 2003-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 68 [patent_no_of_words] => 45016 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/798/06798698.pdf [firstpage_image] =>[orig_patent_app_number] => 10377674 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6795688 [patent_doc_number] => 20030174561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => new [patent_app_number] => 10/377699 [patent_app_country] => US [patent_app_date] => 2003-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7775 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0174/20030174561.pdf [firstpage_image] =>[orig_patent_app_number] => 10377699 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 991623 [patent_doc_number] => 06920072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-19 [patent_title] => 'Apparatus and method for testing redundant memory elements' [patent_app_type] => utility [patent_app_number] => 10/377449 [patent_app_country] => US [patent_app_date] => 2003-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5952 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/920/06920072.pdf [firstpage_image] =>[orig_patent_app_number] => 10377449 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1042149 [patent_doc_number] => 06870778 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-22 [patent_title] => 'Semiconductor device including a voltage monitoring circuit' [patent_app_type] => utility [patent_app_number] => 10/373739 [patent_app_country] => US [patent_app_date] => 2003-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5028 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/870/06870778.pdf [firstpage_image] =>[orig_patent_app_number] => 10373739 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 980383 [patent_doc_number] => 06930913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Contact structure, phase change memory cell, and manufacturing method thereof with elimination of double contacts' [patent_app_type] => utility [patent_app_number] => 10/372639 [patent_app_country] => US [patent_app_date] => 2003-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 33 [patent_no_of_words] => 5591 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930913.pdf [firstpage_image] =>[orig_patent_app_number] => 10372639 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7421131 [patent_doc_number] => 20040160823 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-19 [patent_title] => 'DIFFERENTIAL FLOATING GATE CIRCUIT AND METHOD FOR PROGRAMMING' [patent_app_type] => new [patent_app_number] => 10/367337 [patent_app_country] => US [patent_app_date] => 2003-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 11305 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20040160823.pdf [firstpage_image] =>[orig_patent_app_number] => 10367337 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7623011 [patent_doc_number] => 06687154 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-03 [patent_title] => 'Highly-integrated flash memory and mask ROM array architecture' [patent_app_type] => B2 [patent_app_number] => 10/364033 [patent_app_country] => US [patent_app_date] => 2003-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 11715 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/687/06687154.pdf [firstpage_image] =>[orig_patent_app_number] => 10364033 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7623013 [patent_doc_number] => 06687152 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-02-03 [patent_title] => 'Semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/359143 [patent_app_country] => US [patent_app_date] => 2003-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 36 [patent_no_of_words] => 7967 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/687/06687152.pdf [firstpage_image] =>[orig_patent_app_number] => 10359143 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1029506 [patent_doc_number] => 06882564 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-04-19 [patent_title] => 'Magnetic memory device having magnetic circuit and method of manufacture thereof' [patent_app_type] => utility [patent_app_number] => 10/359151 [patent_app_country] => US [patent_app_date] => 2003-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 65 [patent_no_of_words] => 9915 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/882/06882564.pdf [firstpage_image] =>[orig_patent_app_number] => 10359151 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7633729 [patent_doc_number] => 06657891 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-02 [patent_title] => 'Semiconductor memory device for storing multivalued data' [patent_app_type] => B1 [patent_app_number] => 10/358643 [patent_app_country] => US [patent_app_date] => 2003-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 61 [patent_no_of_words] => 20612 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 6 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/657/06657891.pdf [firstpage_image] =>[orig_patent_app_number] => 10358643 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 964956 [patent_doc_number] => 06950356 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-09-27 [patent_title] => 'Non-volatile memory test structure and method' [patent_app_type] => utility [patent_app_number] => 10/505835 [patent_app_country] => US [patent_app_date] => 2003-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4265 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/950/06950356.pdf [firstpage_image] =>[orig_patent_app_number] => 10505835 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1122834 [patent_doc_number] => 06798684 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-09-28 [patent_title] => 'Methods and systems for programmable memory using silicided poly-silicon fuses' [patent_app_type] => B2 [patent_app_number] => 10/355237 [patent_app_country] => US [patent_app_date] => 2003-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 29 [patent_no_of_words] => 12461 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/798/06798684.pdf [firstpage_image] =>[orig_patent_app_number] => 10355237 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7624531 [patent_doc_number] => 06724645 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-04-20 [patent_title] => 'Method and apparatus for shortening read operations in destructive read memories' [patent_app_type] => B1 [patent_app_number] => 10/356443 [patent_app_country] => US [patent_app_date] => 2003-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3205 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/724/06724645.pdf [firstpage_image] =>[orig_patent_app_number] => 10356443 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1095576 [patent_doc_number] => 06826087 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-11-30 [patent_title] => 'Semiconductor memory storage' [patent_app_type] => B2 [patent_app_number] => 10/353335 [patent_app_country] => US [patent_app_date] => 2003-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6866 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/826/06826087.pdf [firstpage_image] =>[orig_patent_app_number] => 10353335 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6850341 [patent_doc_number] => 20030142543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-31 [patent_title] => 'Memory device, data processing method and data processing program' [patent_app_type] => new [patent_app_number] => 10/351339 [patent_app_country] => US [patent_app_date] => 2003-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6685 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20030142543.pdf [firstpage_image] =>[orig_patent_app_number] => 10351339 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1185380 [patent_doc_number] => 06738310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-05-18 [patent_title] => 'Nonvolatile semiconductor memory' [patent_app_type] => B2 [patent_app_number] => 10/351524 [patent_app_country] => US [patent_app_date] => 2003-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 29 [patent_no_of_words] => 14025 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/738/06738310.pdf [firstpage_image] =>[orig_patent_app_number] => 10351524 [rel_patent_id] =>[rel_patent_doc_number] =>)