Search

Vu Anh Le

Examiner (ID: 15321, Phone: (571)272-1871 , Office: P/2825 )

Most Active Art Unit
2824
Art Unit(s)
2818, 2825, 0, 2824, 2511
Total Applications
2999
Issued Applications
2864
Pending Applications
54
Abandoned Applications
89

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1291909 [patent_doc_number] => 06639831 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-28 [patent_title] => 'Localized MRAM data line and method of operation' [patent_app_type] => B1 [patent_app_number] => 10/321035 [patent_app_country] => US [patent_app_date] => 2002-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 8543 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/639/06639831.pdf [firstpage_image] =>[orig_patent_app_number] => 10321035 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/321035
Localized MRAM data line and method of operation Dec 16, 2002 Issued
Array ( [id] => 1180365 [patent_doc_number] => 06751158 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-06-15 [patent_title] => 'Bit counter, and program circuit in semiconductor device and method of programming using the same' [patent_app_type] => B2 [patent_app_number] => 10/320521 [patent_app_country] => US [patent_app_date] => 2002-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 4396 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/751/06751158.pdf [firstpage_image] =>[orig_patent_app_number] => 10320521 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/320521
Bit counter, and program circuit in semiconductor device and method of programming using the same Dec 16, 2002 Issued
Array ( [id] => 7302438 [patent_doc_number] => 20040114415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-17 [patent_title] => 'Structure of post-process one-time programmable read only memory cell' [patent_app_type] => new [patent_app_number] => 10/320447 [patent_app_country] => US [patent_app_date] => 2002-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1898 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0114/20040114415.pdf [firstpage_image] =>[orig_patent_app_number] => 10320447 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/320447
Structure of post-process one-time programmable read only memory cell Dec 16, 2002 Abandoned
Array ( [id] => 1164535 [patent_doc_number] => 06762973 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-13 [patent_title] => 'Data coherent logic for an SRAM device' [patent_app_type] => B2 [patent_app_number] => 10/322215 [patent_app_country] => US [patent_app_date] => 2002-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3797 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/762/06762973.pdf [firstpage_image] =>[orig_patent_app_number] => 10322215 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/322215
Data coherent logic for an SRAM device Dec 16, 2002 Issued
Array ( [id] => 1149353 [patent_doc_number] => 06778431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-17 [patent_title] => 'Architecture for high-speed magnetic memories' [patent_app_type] => B2 [patent_app_number] => 10/318709 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6346 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/778/06778431.pdf [firstpage_image] =>[orig_patent_app_number] => 10318709 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/318709
Architecture for high-speed magnetic memories Dec 12, 2002 Issued
Array ( [id] => 1241980 [patent_doc_number] => 06683803 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-01-27 [patent_title] => 'Apparatus and methods for data storage and retrieval' [patent_app_type] => B2 [patent_app_number] => 10/318137 [patent_app_country] => US [patent_app_date] => 2002-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 5739 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/683/06683803.pdf [firstpage_image] =>[orig_patent_app_number] => 10318137 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/318137
Apparatus and methods for data storage and retrieval Dec 12, 2002 Issued
Array ( [id] => 6728857 [patent_doc_number] => 20030185047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-02 [patent_title] => 'Architecture of a phase-change nonvolatile memory array' [patent_app_type] => new [patent_app_number] => 10/319439 [patent_app_country] => US [patent_app_date] => 2002-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2881 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20030185047.pdf [firstpage_image] =>[orig_patent_app_number] => 10319439 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/319439
Architecture of a phase-change nonvolatile memory array Dec 11, 2002 Issued
Array ( [id] => 6681962 [patent_doc_number] => 20030117826 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-26 [patent_title] => 'Semiconductor memory device and electronic instrument' [patent_app_type] => new [patent_app_number] => 10/318271 [patent_app_country] => US [patent_app_date] => 2002-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6678 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0117/20030117826.pdf [firstpage_image] =>[orig_patent_app_number] => 10318271 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/318271
Semiconductor memory device and electronic instrument Dec 11, 2002 Issued
Array ( [id] => 957025 [patent_doc_number] => 06956779 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-18 [patent_title] => 'Multistage autozero sensing for a multilevel non-volatile memory integrated circuit system' [patent_app_type] => utility [patent_app_number] => 10/317455 [patent_app_country] => US [patent_app_date] => 2002-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 78 [patent_figures_cnt] => 89 [patent_no_of_words] => 43465 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/956/06956779.pdf [firstpage_image] =>[orig_patent_app_number] => 10317455 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/317455
Multistage autozero sensing for a multilevel non-volatile memory integrated circuit system Dec 10, 2002 Issued
Array ( [id] => 7289698 [patent_doc_number] => 20040110324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Method of forming a negative differential resistance device' [patent_app_type] => new [patent_app_number] => 10/314735 [patent_app_country] => US [patent_app_date] => 2002-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 15003 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20040110324.pdf [firstpage_image] =>[orig_patent_app_number] => 10314735 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/314735
Method of forming a negative differential resistance device Dec 8, 2002 Issued
Array ( [id] => 1183162 [patent_doc_number] => 06744659 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Source-biased memory cell array' [patent_app_type] => B1 [patent_app_number] => 10/315523 [patent_app_country] => US [patent_app_date] => 2002-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3973 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/744/06744659.pdf [firstpage_image] =>[orig_patent_app_number] => 10315523 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/315523
Source-biased memory cell array Dec 8, 2002 Issued
Array ( [id] => 7287912 [patent_doc_number] => 20040109376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Method for detecting logical address of flash memory' [patent_app_type] => new [patent_app_number] => 10/314123 [patent_app_country] => US [patent_app_date] => 2002-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2709 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0109/20040109376.pdf [firstpage_image] =>[orig_patent_app_number] => 10314123 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/314123
Method for detecting logical address of flash memory Dec 8, 2002 Abandoned
Array ( [id] => 6695745 [patent_doc_number] => 20030107939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Refresh apparatus for semiconductor memory device, and refresh method thereof' [patent_app_type] => new [patent_app_number] => 10/313445 [patent_app_country] => US [patent_app_date] => 2002-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4194 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0107/20030107939.pdf [firstpage_image] =>[orig_patent_app_number] => 10313445 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/313445
Refresh apparatus for semiconductor memory device, and refresh method thereof Dec 5, 2002 Issued
Array ( [id] => 1292155 [patent_doc_number] => 06639869 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-10-28 [patent_title] => 'Clock-synchronous semiconductor memory device' [patent_app_type] => B2 [patent_app_number] => 10/310797 [patent_app_country] => US [patent_app_date] => 2002-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5121 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/639/06639869.pdf [firstpage_image] =>[orig_patent_app_number] => 10310797 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/310797
Clock-synchronous semiconductor memory device Dec 5, 2002 Issued
Array ( [id] => 1126972 [patent_doc_number] => 06795342 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-21 [patent_title] => 'System for programming a non-volatile memory cell' [patent_app_type] => B1 [patent_app_number] => 10/307667 [patent_app_country] => US [patent_app_date] => 2002-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6638 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/795/06795342.pdf [firstpage_image] =>[orig_patent_app_number] => 10307667 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/307667
System for programming a non-volatile memory cell Dec 1, 2002 Issued
Array ( [id] => 7459574 [patent_doc_number] => 20040100849 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'METHOD OF UTILIZING A PLURALITY OF VOLTAGE PULSES TO PROGRAM NON-VOLATILE MEMORY ELEMENTS AND RELATED EMBEDDED MEMORIES' [patent_app_type] => new [patent_app_number] => 10/305735 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6560 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20040100849.pdf [firstpage_image] =>[orig_patent_app_number] => 10305735 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/305735
Method of utilizing a plurality of voltage pulses to program non-volatile memory elements and related embedded memories Nov 26, 2002 Issued
Array ( [id] => 7459362 [patent_doc_number] => 20040100817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Magnetoresistive random access memory (MRAM) cell having a diode with asymmetrical characteristics' [patent_app_type] => new [patent_app_number] => 10/304625 [patent_app_country] => US [patent_app_date] => 2002-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3062 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20040100817.pdf [firstpage_image] =>[orig_patent_app_number] => 10304625 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/304625
Magnetoresistive random access memory (MRAM) cell having a diode with asymmetrical characteristics Nov 25, 2002 Issued
Array ( [id] => 6808144 [patent_doc_number] => 20030198083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-10-23 [patent_title] => 'Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics' [patent_app_type] => new [patent_app_number] => 10/265107 [patent_app_country] => US [patent_app_date] => 2002-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 86 [patent_figures_cnt] => 86 [patent_no_of_words] => 28629 [patent_no_of_claims] => 61 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20030198083.pdf [firstpage_image] =>[orig_patent_app_number] => 10265107 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/265107
Nonvolatile semiconductor memory device having electrically and collectively erasable characteristics Nov 25, 2002 Abandoned
Array ( [id] => 6636496 [patent_doc_number] => 20030103382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Nonvolatile semiconductor memory device and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/301643 [patent_app_country] => US [patent_app_date] => 2002-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 13786 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20030103382.pdf [firstpage_image] =>[orig_patent_app_number] => 10301643 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/301643
Nonvolatile semiconductor memory device and manufacturing method thereof Nov 21, 2002 Issued
Array ( [id] => 6800270 [patent_doc_number] => 20030095434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-22 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => new [patent_app_number] => 10/300813 [patent_app_country] => US [patent_app_date] => 2002-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 18594 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20030095434.pdf [firstpage_image] =>[orig_patent_app_number] => 10300813 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/300813
Semiconductor integrated circuit device Nov 20, 2002 Issued
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