Search

Wae Lenny Louie

Examiner (ID: 18361, Phone: (571)272-5195 , Office: P/3661 )

Most Active Art Unit
3661
Art Unit(s)
3661
Total Applications
963
Issued Applications
794
Pending Applications
67
Abandoned Applications
135

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16966276 [patent_doc_number] => 20210217775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-15 [patent_title] => CROSS-POINT ARRAY OF FERROELECTRIC FIELD EFFECT TRANSISTORS AND METHOD OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 16/738644 [patent_app_country] => US [patent_app_date] => 2020-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12316 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16738644 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/738644
Cross-point array of ferroelectric field effect transistors and method of making the same Jan 8, 2020 Issued
Array ( [id] => 15906467 [patent_doc_number] => 20200152754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => SEMICONDUCTOR DEVICE HAVING BURIED GATE STRUCTURE, METHOD FOR MANUFACTURING THE SAME, AND MEMORY CELL HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 16/735443 [patent_app_country] => US [patent_app_date] => 2020-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26526 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16735443 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/735443
Semiconductor device having buried gate structure, method for manufacturing the same, and memory cell having the same Jan 5, 2020 Issued
Array ( [id] => 15807979 [patent_doc_number] => 20200127132 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => STRUCTURE TO ENABLE TITANIUM CONTACT LINER ON pFET SOURCE/DRAIN REGIONS [patent_app_type] => utility [patent_app_number] => 16/719240 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7715 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16719240 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/719240
Structure to enable titanium contact liner on pFET source/drain regions Dec 17, 2019 Issued
Array ( [id] => 18983673 [patent_doc_number] => 11908862 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => FinFET and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 16/707042 [patent_app_country] => US [patent_app_date] => 2019-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 6812 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16707042 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/707042
FinFET and fabrication method thereof Dec 8, 2019 Issued
Array ( [id] => 15745855 [patent_doc_number] => 20200111817 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/705304 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29674 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 420 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16705304 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/705304
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Dec 5, 2019 Abandoned
Array ( [id] => 19294575 [patent_doc_number] => 12033939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-09 [patent_title] => Electrical fuse structure and method of formation [patent_app_type] => utility [patent_app_number] => 16/696929 [patent_app_country] => US [patent_app_date] => 2019-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 7991 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16696929 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/696929
Electrical fuse structure and method of formation Nov 25, 2019 Issued
Array ( [id] => 17424403 [patent_doc_number] => 11257866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-22 [patent_title] => Integrated reactive material erasure element with phase change memory [patent_app_type] => utility [patent_app_number] => 16/692586 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4938 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16692586 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/692586
Integrated reactive material erasure element with phase change memory Nov 21, 2019 Issued
Array ( [id] => 17893196 [patent_doc_number] => 11456176 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-09-27 [patent_title] => Gate electrodes with notches and methods for forming the same [patent_app_type] => utility [patent_app_number] => 16/685480 [patent_app_country] => US [patent_app_date] => 2019-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 18 [patent_no_of_words] => 3040 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16685480 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/685480
Gate electrodes with notches and methods for forming the same Nov 14, 2019 Issued
Array ( [id] => 15598273 [patent_doc_number] => 20200075671 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => MAGNETIC MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/678316 [patent_app_country] => US [patent_app_date] => 2019-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4268 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16678316 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/678316
MAGNETIC MEMORY DEVICE Nov 7, 2019 Abandoned
Array ( [id] => 15841371 [patent_doc_number] => 20200135968 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => LIGHT EMITTING BIPOLAR TRANSISTOR [patent_app_type] => utility [patent_app_number] => 16/668954 [patent_app_country] => US [patent_app_date] => 2019-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6700 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16668954 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/668954
LIGHT EMITTING BIPOLAR TRANSISTOR Oct 29, 2019 Abandoned
Array ( [id] => 17545313 [patent_doc_number] => 11310457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-19 [patent_title] => Display device and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/663403 [patent_app_country] => US [patent_app_date] => 2019-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 64 [patent_no_of_words] => 21993 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16663403 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/663403
Display device and method for manufacturing the same Oct 24, 2019 Issued
Array ( [id] => 15564939 [patent_doc_number] => 20200066881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-27 [patent_title] => METHOD AND STRUCTURE FOR FORMING A VERTICAL FIELD-EFFECT TRANSISTOR [patent_app_type] => utility [patent_app_number] => 16/664060 [patent_app_country] => US [patent_app_date] => 2019-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7995 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16664060 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/664060
Method and structure for forming a vertical field-effect transistor Oct 24, 2019 Issued
Array ( [id] => 17652900 [patent_doc_number] => 11355642 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-07 [patent_title] => Method for manufacturing semiconductor structure [patent_app_type] => utility [patent_app_number] => 16/657035 [patent_app_country] => US [patent_app_date] => 2019-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 3764 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16657035 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/657035
Method for manufacturing semiconductor structure Oct 17, 2019 Issued
Array ( [id] => 15503849 [patent_doc_number] => 20200052113 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => Methods of Forming Integrated Circuitry [patent_app_type] => utility [patent_app_number] => 16/596423 [patent_app_country] => US [patent_app_date] => 2019-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6491 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16596423 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/596423
Methods of forming integrated circuitry Oct 7, 2019 Issued
Array ( [id] => 17941662 [patent_doc_number] => 11476121 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-18 [patent_title] => Method of forming multi-threshold voltage devices and devices so formed [patent_app_type] => utility [patent_app_number] => 16/551028 [patent_app_country] => US [patent_app_date] => 2019-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 5471 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16551028 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/551028
Method of forming multi-threshold voltage devices and devices so formed Aug 25, 2019 Issued
Array ( [id] => 15503407 [patent_doc_number] => 20200051892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => POWER SEMICONDUCTOR MODULE AND VEHICLE [patent_app_type] => utility [patent_app_number] => 16/525581 [patent_app_country] => US [patent_app_date] => 2019-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8394 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 12 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16525581 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/525581
Power semiconductor module and vehicle Jul 29, 2019 Issued
Array ( [id] => 16301266 [patent_doc_number] => 20200286989 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-10 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/448166 [patent_app_country] => US [patent_app_date] => 2019-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3165 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16448166 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/448166
Semiconductor device Jun 20, 2019 Issued
Array ( [id] => 16521619 [patent_doc_number] => 10872844 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-22 [patent_title] => Semiconductor device with sealed semiconductor chip [patent_app_type] => utility [patent_app_number] => 16/438826 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 10131 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16438826 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/438826
Semiconductor device with sealed semiconductor chip Jun 11, 2019 Issued
Array ( [id] => 19139452 [patent_doc_number] => 11974444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Solid-state image sensor, solid-state imaging device, electronic apparatus, and method of manufacturing solid-state image sensor [patent_app_type] => utility [patent_app_number] => 16/973272 [patent_app_country] => US [patent_app_date] => 2019-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 45 [patent_no_of_words] => 24712 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16973272 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/973272
Solid-state image sensor, solid-state imaging device, electronic apparatus, and method of manufacturing solid-state image sensor Jun 10, 2019 Issued
Array ( [id] => 14904501 [patent_doc_number] => 20190296016 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-26 [patent_title] => Gated Bipolar Junction Transistors, Memory Arrays, and Methods of Forming Gated Bipolar Junction Transistors [patent_app_type] => utility [patent_app_number] => 16/436689 [patent_app_country] => US [patent_app_date] => 2019-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8426 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16436689 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/436689
Gated bipolar junction transistors, memory arrays, and methods of forming gated bipolar junction transistors Jun 9, 2019 Issued
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