
Wae Lenny Louie
Examiner (ID: 18361, Phone: (571)272-5195 , Office: P/3661 )
| Most Active Art Unit | 3661 |
| Art Unit(s) | 3661 |
| Total Applications | 963 |
| Issued Applications | 794 |
| Pending Applications | 67 |
| Abandoned Applications | 135 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 17410282
[patent_doc_number] => 11251180
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-15
[patent_title] => Transistor and method for forming the same
[patent_app_type] => utility
[patent_app_number] => 16/430941
[patent_app_country] => US
[patent_app_date] => 2019-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3183
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16430941
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/430941 | Transistor and method for forming the same | Jun 3, 2019 | Issued |
Array
(
[id] => 16502725
[patent_doc_number] => 10868126
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-15
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/429217
[patent_app_country] => US
[patent_app_date] => 2019-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 22
[patent_no_of_words] => 13709
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16429217
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/429217 | Semiconductor device | Jun 2, 2019 | Issued |
Array
(
[id] => 14843215
[patent_doc_number] => 20190280008
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-09-12
[patent_title] => MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/423680
[patent_app_country] => US
[patent_app_date] => 2019-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13562
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16423680
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/423680 | MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME | May 27, 2019 | Abandoned |
Array
(
[id] => 19525675
[patent_doc_number] => 12127433
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-22
[patent_title] => Display device and driving method thereof
[patent_app_type] => utility
[patent_app_number] => 17/266496
[patent_app_country] => US
[patent_app_date] => 2019-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 14603
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17266496
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/266496 | Display device and driving method thereof | May 21, 2019 | Issued |
Array
(
[id] => 15218505
[patent_doc_number] => 20190371939
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-12-05
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/416420
[patent_app_country] => US
[patent_app_date] => 2019-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5895
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16416420
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/416420 | Semiconductor device and method for manufacturing the same | May 19, 2019 | Issued |
Array
(
[id] => 16440565
[patent_doc_number] => 20200357892
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-12
[patent_title] => FIELD-EFFECT TRANSISTORS WITH VERTICALLY-SERPENTINE GATES
[patent_app_type] => utility
[patent_app_number] => 16/405469
[patent_app_country] => US
[patent_app_date] => 2019-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3925
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16405469
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/405469 | Field-effect transistors with vertically-serpentine gates | May 6, 2019 | Issued |
Array
(
[id] => 16440582
[patent_doc_number] => 20200357909
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-12
[patent_title] => III-V SEMICONDUCTOR DEVICE WITH INTEGRATED POWER TRANSISTOR AND START-UP CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 16/405537
[patent_app_country] => US
[patent_app_date] => 2019-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11102
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16405537
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/405537 | III-V semiconductor device with integrated power transistor and start-up circuit | May 6, 2019 | Issued |
Array
(
[id] => 15776327
[patent_doc_number] => 20200119181
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-16
[patent_title] => SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 16/393234
[patent_app_country] => US
[patent_app_date] => 2019-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7072
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16393234
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/393234 | Semiconductor devices | Apr 23, 2019 | Issued |
Array
(
[id] => 14631483
[patent_doc_number] => 20190229111
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-07-25
[patent_title] => INTERNALLY STACKED NPN WITH SEGMENTED COLLECTOR
[patent_app_type] => utility
[patent_app_number] => 16/371960
[patent_app_country] => US
[patent_app_date] => 2019-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5781
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16371960
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/371960 | Internally stacked NPN with segmented collector | Mar 31, 2019 | Issued |
Array
(
[id] => 15046045
[patent_doc_number] => 20190334027
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-31
[patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND A SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/370668
[patent_app_country] => US
[patent_app_date] => 2019-03-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11358
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16370668
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/370668 | Method of manufacturing a semiconductor device and a semiconductor device | Mar 28, 2019 | Issued |
Array
(
[id] => 17239604
[patent_doc_number] => 11183496
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-23
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/366140
[patent_app_country] => US
[patent_app_date] => 2019-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 18
[patent_no_of_words] => 8182
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 283
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16366140
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/366140 | Semiconductor device | Mar 26, 2019 | Issued |
Array
(
[id] => 15218491
[patent_doc_number] => 20190371932
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-12-05
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/366379
[patent_app_country] => US
[patent_app_date] => 2019-03-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12618
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16366379
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/366379 | Semiconductor device | Mar 26, 2019 | Issued |
Array
(
[id] => 17152526
[patent_doc_number] => 11145617
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-10-12
[patent_title] => Semiconductor structure
[patent_app_type] => utility
[patent_app_number] => 16/360040
[patent_app_country] => US
[patent_app_date] => 2019-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 2686
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16360040
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/360040 | Semiconductor structure | Mar 20, 2019 | Issued |
Array
(
[id] => 16272595
[patent_doc_number] => 20200274083
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-27
[patent_title] => FLEXIBLE OLED DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/476291
[patent_app_country] => US
[patent_app_date] => 2019-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3717
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16476291
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/476291 | FLEXIBLE OLED DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF | Mar 20, 2019 | Abandoned |
Array
(
[id] => 14904707
[patent_doc_number] => 20190296119
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-09-26
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/357338
[patent_app_country] => US
[patent_app_date] => 2019-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9092
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 235
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16357338
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/357338 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Mar 18, 2019 | Abandoned |
Array
(
[id] => 14904707
[patent_doc_number] => 20190296119
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-09-26
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/357338
[patent_app_country] => US
[patent_app_date] => 2019-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9092
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 235
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16357338
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/357338 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE | Mar 18, 2019 | Abandoned |
Array
(
[id] => 16301294
[patent_doc_number] => 20200287017
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-10
[patent_title] => SINGLE TRANSISTOR WITH STRAINED AND DE-POLARIZING ANTI-FERROELECTRIC AND FERROELECTRIC OXIDE
[patent_app_type] => utility
[patent_app_number] => 16/294821
[patent_app_country] => US
[patent_app_date] => 2019-03-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9976
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16294821
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/294821 | SINGLE TRANSISTOR WITH STRAINED AND DE-POLARIZING ANTI-FERROELECTRIC AND FERROELECTRIC OXIDE | Mar 5, 2019 | Abandoned |
Array
(
[id] => 16593885
[patent_doc_number] => 10903162
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-01-26
[patent_title] => Fuse element resistance enhancement by laser anneal and ion implantation
[patent_app_type] => utility
[patent_app_number] => 16/293237
[patent_app_country] => US
[patent_app_date] => 2019-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 4006
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16293237
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/293237 | Fuse element resistance enhancement by laser anneal and ion implantation | Mar 4, 2019 | Issued |
Array
(
[id] => 17516824
[patent_doc_number] => 11295985
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-04-05
[patent_title] => Forming a backside ground or power plane in a stacked vertical transport field effect transistor
[patent_app_type] => utility
[patent_app_number] => 16/293166
[patent_app_country] => US
[patent_app_date] => 2019-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 13652
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16293166
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/293166 | Forming a backside ground or power plane in a stacked vertical transport field effect transistor | Mar 4, 2019 | Issued |
Array
(
[id] => 16301413
[patent_doc_number] => 20200287136
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-10
[patent_title] => RELIABLE RESISTIVE RANDOM ACCESS MEMORY
[patent_app_type] => utility
[patent_app_number] => 16/291598
[patent_app_country] => US
[patent_app_date] => 2019-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5362
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16291598
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/291598 | Reliable resistive random access memory | Mar 3, 2019 | Issued |