Search

Walter A. Moore

Examiner (ID: 5263, Phone: (571)270-7372 , Office: P/1793 )

Most Active Art Unit
1793
Art Unit(s)
1783, 1793, CQIC, 1794, 3619, 1789
Total Applications
541
Issued Applications
122
Pending Applications
5
Abandoned Applications
413

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16425112 [patent_doc_number] => 20200350310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-11-05 [patent_title] => METHOD TO FORM A 3D INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/936352 [patent_app_country] => US [patent_app_date] => 2020-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24586 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16936352 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/936352
Method to form a 3D integrated circuit Jul 21, 2020 Issued
Array ( [id] => 16873525 [patent_doc_number] => 20210166992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => METHODS AND STRUCTURES FOR INCREASING THE ALLOWABLE DIE SIZE IN TMV PACKAGES [patent_app_type] => utility [patent_app_number] => 16/927454 [patent_app_country] => US [patent_app_date] => 2020-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3781 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16927454 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/927454
Methods and structures for increasing the allowable die size in TMV packages Jul 12, 2020 Issued
Array ( [id] => 17063093 [patent_doc_number] => 11107703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-31 [patent_title] => Monolithic, biocompatible feedthrough for hermetically sealed electronics and methods of manufacture [patent_app_type] => utility [patent_app_number] => 16/924442 [patent_app_country] => US [patent_app_date] => 2020-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 5495 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16924442 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/924442
Monolithic, biocompatible feedthrough for hermetically sealed electronics and methods of manufacture Jul 8, 2020 Issued
Array ( [id] => 16402293 [patent_doc_number] => 20200343151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-29 [patent_title] => MODULE WITH BUILT-IN COMPONENT AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/923211 [patent_app_country] => US [patent_app_date] => 2020-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7329 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16923211 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/923211
Module with built-in component and method for manufacturing the same Jul 7, 2020 Issued
Array ( [id] => 16835222 [patent_doc_number] => 11011482 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-18 [patent_title] => Fan-out semiconductor package [patent_app_type] => utility [patent_app_number] => 16/916381 [patent_app_country] => US [patent_app_date] => 2020-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 22 [patent_no_of_words] => 12765 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16916381 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/916381
Fan-out semiconductor package Jun 29, 2020 Issued
Array ( [id] => 16936533 [patent_doc_number] => 20210202422 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => FLIP CHIP INTERCONNECTION AND CIRCUIT BOARD THEREOF [patent_app_type] => utility [patent_app_number] => 16/910461 [patent_app_country] => US [patent_app_date] => 2020-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2918 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16910461 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/910461
Flip chip package and circuit board thereof Jun 23, 2020 Issued
Array ( [id] => 16364567 [patent_doc_number] => 20200321318 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-08 [patent_title] => MEMORY DEVICES WITH CONTROLLERS UNDER MEMORY PACKAGES AND ASSOCIATED SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 16/909522 [patent_app_country] => US [patent_app_date] => 2020-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4627 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16909522 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/909522
Memory devices with controllers under memory packages and associated systems and methods Jun 22, 2020 Issued
Array ( [id] => 17607179 [patent_doc_number] => 11335671 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-17 [patent_title] => Stacked die assembly including double-sided inter-die bonding connections and methods of forming the same [patent_app_type] => utility [patent_app_number] => 16/886164 [patent_app_country] => US [patent_app_date] => 2020-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13631 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16886164 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/886164
Stacked die assembly including double-sided inter-die bonding connections and methods of forming the same May 27, 2020 Issued
Array ( [id] => 17424474 [patent_doc_number] => 11257938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-22 [patent_title] => Group III nitride semiconductor device with first and second conductive layers [patent_app_type] => utility [patent_app_number] => 16/884939 [patent_app_country] => US [patent_app_date] => 2020-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 10165 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16884939 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/884939
Group III nitride semiconductor device with first and second conductive layers May 26, 2020 Issued
Array ( [id] => 16973634 [patent_doc_number] => 11069614 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-20 [patent_title] => Semiconductor package structure [patent_app_type] => utility [patent_app_number] => 16/870458 [patent_app_country] => US [patent_app_date] => 2020-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 12218 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16870458 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/870458
Semiconductor package structure May 7, 2020 Issued
Array ( [id] => 16256808 [patent_doc_number] => 20200266183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-20 [patent_title] => DISPLAY DEVICE WITH A CHIP ON FILM [patent_app_type] => utility [patent_app_number] => 16/869899 [patent_app_country] => US [patent_app_date] => 2020-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9369 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16869899 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/869899
Display device with a chip on film May 7, 2020 Issued
Array ( [id] => 16502595 [patent_doc_number] => 10867993 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Touch sensing circuits and methods for detecting touch events [patent_app_type] => utility [patent_app_number] => 16/824779 [patent_app_country] => US [patent_app_date] => 2020-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5507 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16824779 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/824779
Touch sensing circuits and methods for detecting touch events Mar 19, 2020 Issued
Array ( [id] => 18371857 [patent_doc_number] => 11652039 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => Packaging substrate with core layer and cavity structure and semiconductor device comprising the same [patent_app_type] => utility [patent_app_number] => 17/433349 [patent_app_country] => US [patent_app_date] => 2020-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 22 [patent_no_of_words] => 14963 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17433349 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/433349
Packaging substrate with core layer and cavity structure and semiconductor device comprising the same Mar 11, 2020 Issued
Array ( [id] => 16021287 [patent_doc_number] => 20200185487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-11 [patent_title] => ORGANIC LIGHT EMITTING DIODE DISPLAY [patent_app_type] => utility [patent_app_number] => 16/792410 [patent_app_country] => US [patent_app_date] => 2020-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8791 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16792410 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/792410
Organic light emitting diode display Feb 16, 2020 Issued
Array ( [id] => 17638258 [patent_doc_number] => 11348994 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-31 [patent_title] => Fingerprint sensors [patent_app_type] => utility [patent_app_number] => 16/782200 [patent_app_country] => US [patent_app_date] => 2020-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 6202 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16782200 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/782200
Fingerprint sensors Feb 4, 2020 Issued
Array ( [id] => 16194234 [patent_doc_number] => 20200235083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => SEMICONDUCTOR MODULE [patent_app_type] => utility [patent_app_number] => 16/744437 [patent_app_country] => US [patent_app_date] => 2020-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6900 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16744437 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/744437
Semiconductor module including multiple power management semiconductor packages Jan 15, 2020 Issued
Array ( [id] => 16896325 [patent_doc_number] => 11037887 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Method of making package assembly including stress relief structures [patent_app_type] => utility [patent_app_number] => 16/728305 [patent_app_country] => US [patent_app_date] => 2019-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 3734 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16728305 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/728305
Method of making package assembly including stress relief structures Dec 26, 2019 Issued
Array ( [id] => 16936443 [patent_doc_number] => 20210202332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-07-01 [patent_title] => Scalable Extreme Large Size Substrate Integration [patent_app_type] => utility [patent_app_number] => 16/729094 [patent_app_country] => US [patent_app_date] => 2019-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3442 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16729094 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/729094
Scalable extreme large size substrate integration Dec 26, 2019 Issued
Array ( [id] => 18000948 [patent_doc_number] => 11502059 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-15 [patent_title] => Semiconductor package including a thermal pillar and heat transfer film [patent_app_type] => utility [patent_app_number] => 16/724592 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 22 [patent_no_of_words] => 14049 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16724592 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/724592
Semiconductor package including a thermal pillar and heat transfer film Dec 22, 2019 Issued
Array ( [id] => 16645596 [patent_doc_number] => 10923464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Connection system of semiconductor packages using a printed circuit board [patent_app_type] => utility [patent_app_number] => 16/725449 [patent_app_country] => US [patent_app_date] => 2019-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 31 [patent_no_of_words] => 20099 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725449 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/725449
Connection system of semiconductor packages using a printed circuit board Dec 22, 2019 Issued
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