Search

Warren Edmonds

Examiner (ID: 13636)

Most Active Art Unit
2607
Art Unit(s)
2618, 2215, 2607
Total Applications
654
Issued Applications
584
Pending Applications
1
Abandoned Applications
69

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20298336 [patent_doc_number] => 20250323579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => INTERFACE CIRCUIT USING MIRRORED CURRENT FEEDBACK TO REDUCE INPUT IMPEDANCE [patent_app_type] => utility [patent_app_number] => 19/048681 [patent_app_country] => US [patent_app_date] => 2025-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1961 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19048681 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/048681
INTERFACE CIRCUIT USING MIRRORED CURRENT FEEDBACK TO REDUCE INPUT IMPEDANCE Feb 6, 2025 Pending
Array ( [id] => 20325311 [patent_doc_number] => 20250337399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-30 [patent_title] => BUFFER AND INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 19/023094 [patent_app_country] => US [patent_app_date] => 2025-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5136 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19023094 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/023094
BUFFER AND INTEGRATED CIRCUIT Jan 14, 2025 Pending
Array ( [id] => 20011248 [patent_doc_number] => 20250149470 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => Transient Stabilized SOI FETs [patent_app_type] => utility [patent_app_number] => 19/018452 [patent_app_country] => US [patent_app_date] => 2025-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7975 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19018452 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/018452
Transient Stabilized SOI FETs Jan 12, 2025 Pending
Array ( [id] => 20089688 [patent_doc_number] => 20250219624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => SLEW RATE PROTECTION CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/999022 [patent_app_country] => US [patent_app_date] => 2024-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1197 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18999022 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/999022
SLEW RATE PROTECTION CIRCUIT Dec 22, 2024 Pending
Array ( [id] => 19851449 [patent_doc_number] => 20250096800 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => MULTIPLEXING CIRCUIT, OUTPUT STAGE, AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/970786 [patent_app_country] => US [patent_app_date] => 2024-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5733 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18970786 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/970786
MULTIPLEXING CIRCUIT, OUTPUT STAGE, AND SEMICONDUCTOR DEVICE Dec 4, 2024 Pending
Array ( [id] => 19836400 [patent_doc_number] => 20250088186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => SWITCHING TRANDUCER DRIVER [patent_app_type] => utility [patent_app_number] => 18/948973 [patent_app_country] => US [patent_app_date] => 2024-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18948973 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/948973
SWITCHING TRANDUCER DRIVER Nov 14, 2024 Pending
Array ( [id] => 19804842 [patent_doc_number] => 20250070767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => SIGNAL TRANSMISSION DEVICE CAPABLE OF SHORTENING TURN-OFF TIME OF CONTROLLED SOURCE IN ELECTROMAGNETIC METHOD [patent_app_type] => utility [patent_app_number] => 18/945463 [patent_app_country] => US [patent_app_date] => 2024-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18945463 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/945463
SIGNAL TRANSMISSION DEVICE CAPABLE OF SHORTENING TURN-OFF TIME OF CONTROLLED SOURCE IN ELECTROMAGNETIC METHOD Nov 11, 2024 Pending
Array ( [id] => 19786725 [patent_doc_number] => 20250060404 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => GAN RELIABILITY BUILT-IN SELF TEST (BIST) APPARATUS AND METHOD FOR QUALIFYING DYNAMIC ON-STATE RESISTANCE DEGRADATION [patent_app_type] => utility [patent_app_number] => 18/936841 [patent_app_country] => US [patent_app_date] => 2024-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18936841 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/936841
GAN RELIABILITY BUILT-IN SELF TEST (BIST) APPARATUS AND METHOD FOR QUALIFYING DYNAMIC ON-STATE RESISTANCE DEGRADATION Nov 3, 2024 Pending
Array ( [id] => 19774025 [patent_doc_number] => 20250055451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => UNDER VOLTAGE LOCK-OUT CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/928390 [patent_app_country] => US [patent_app_date] => 2024-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18928390 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/928390
UNDER VOLTAGE LOCK-OUT CIRCUIT Oct 27, 2024 Pending
Array ( [id] => 20029553 [patent_doc_number] => 20250167775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => THRESHOLD GENERATION CIRCUIT, CORRESPONDING SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 18/921440 [patent_app_country] => US [patent_app_date] => 2024-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18921440 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/921440
THRESHOLD GENERATION CIRCUIT, CORRESPONDING SYSTEM AND METHOD Oct 20, 2024 Pending
Array ( [id] => 20137741 [patent_doc_number] => 20250244785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => CHARACTERISTIC COMPENSATION CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/914740 [patent_app_country] => US [patent_app_date] => 2024-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18914740 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/914740
CHARACTERISTIC COMPENSATION CIRCUIT Oct 13, 2024 Pending
Array ( [id] => 19727664 [patent_doc_number] => 20250030415 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => RF SWITCH WITH BYPASS TOPOLOGY [patent_app_type] => utility [patent_app_number] => 18/905117 [patent_app_country] => US [patent_app_date] => 2024-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8661 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18905117 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/905117
RF SWITCH WITH BYPASS TOPOLOGY Oct 1, 2024 Pending
Array ( [id] => 20572959 [patent_doc_number] => 20260066888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-05 [patent_title] => ANALOG RADIO FREQUENCY PULSE GENERATORS WITH COMPENSATION [patent_app_type] => utility [patent_app_number] => 18/818993 [patent_app_country] => US [patent_app_date] => 2024-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8933 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18818993 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/818993
ANALOG RADIO FREQUENCY PULSE GENERATORS WITH COMPENSATION Aug 28, 2024 Pending
Array ( [id] => 20544995 [patent_doc_number] => 20260051888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-19 [patent_title] => CAPACITIVE ELEMENT AND CIRCUIT STRUCTURE INCLUDING CAPACITIVE ELEMENT(S) [patent_app_type] => utility [patent_app_number] => 18/804603 [patent_app_country] => US [patent_app_date] => 2024-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2428 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18804603 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/804603
CAPACITIVE ELEMENT AND CIRCUIT STRUCTURE INCLUDING CAPACITIVE ELEMENT(S) Aug 13, 2024 Pending
Array ( [id] => 20521826 [patent_doc_number] => 20260045935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-02-12 [patent_title] => SINE-WAVE GENERATOR INCLUDING FINITE IMPULSE RESPONSE FILTER-BASED HARMONIC CANCELLATION [patent_app_type] => utility [patent_app_number] => 18/795300 [patent_app_country] => US [patent_app_date] => 2024-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11985 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18795300 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/795300
SINE-WAVE GENERATOR INCLUDING FINITE IMPULSE RESPONSE FILTER-BASED HARMONIC CANCELLATION Aug 5, 2024 Pending
Array ( [id] => 19851447 [patent_doc_number] => 20250096798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => SAMPLE AND HOLD CIRCUIT, INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/791919 [patent_app_country] => US [patent_app_date] => 2024-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8157 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18791919 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/791919
SAMPLE AND HOLD CIRCUIT, INTEGRATED CIRCUIT AND METHOD OF MANUFACTURING THE SAME Jul 31, 2024 Pending
Array ( [id] => 19605668 [patent_doc_number] => 20240396548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => BIDIRECTIONAL POWER SWITCH [patent_app_type] => utility [patent_app_number] => 18/790431 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7111 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18790431 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/790431
BIDIRECTIONAL POWER SWITCH Jul 30, 2024 Pending
Array ( [id] => 19590726 [patent_doc_number] => 20240388283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => COMPARATOR CIRCUITS [patent_app_type] => utility [patent_app_number] => 18/790021 [patent_app_country] => US [patent_app_date] => 2024-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2247 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18790021 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/790021
COMPARATOR CIRCUITS Jul 30, 2024 Pending
Array ( [id] => 19620091 [patent_doc_number] => 20240405771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => BODY RESISTOR BYPASS FOR RF FET SWITCH STACK [patent_app_type] => utility [patent_app_number] => 18/782357 [patent_app_country] => US [patent_app_date] => 2024-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5242 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18782357 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/782357
BODY RESISTOR BYPASS FOR RF FET SWITCH STACK Jul 23, 2024 Pending
Array ( [id] => 20488933 [patent_doc_number] => 20260025135 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-22 [patent_title] => RADIO FREQUENCY CIRCUIT WITH BACK GATE-ASSISTED MIXING OF RADIO FREQUENCY AND LOCAL OSCILLATOR SIGNALS [patent_app_type] => utility [patent_app_number] => 18/775084 [patent_app_country] => US [patent_app_date] => 2024-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1123 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18775084 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/775084
RADIO FREQUENCY CIRCUIT WITH BACK GATE-ASSISTED MIXING OF RADIO FREQUENCY AND LOCAL OSCILLATOR SIGNALS Jul 16, 2024 Pending
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