Search

Wasiul Haider

Examiner (ID: 8046, Phone: (571)272-1554 , Office: P/2819 )

Most Active Art Unit
2819
Art Unit(s)
2819, 2814, 2812
Total Applications
732
Issued Applications
643
Pending Applications
70
Abandoned Applications
49

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18061771 [patent_doc_number] => 20220392858 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-08 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/890254 [patent_app_country] => US [patent_app_date] => 2022-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14187 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17890254 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/890254
Semiconductor device Aug 16, 2022 Issued
Array ( [id] => 20405587 [patent_doc_number] => 12495577 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-09 [patent_title] => Self-aligned silicide gate for discrete shielded-gate trench power MOSFET [patent_app_type] => utility [patent_app_number] => 17/890209 [patent_app_country] => US [patent_app_date] => 2022-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 1940 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17890209 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/890209
Self-aligned silicide gate for discrete shielded-gate trench power MOSFET Aug 16, 2022 Issued
Array ( [id] => 19926423 [patent_doc_number] => 12300719 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Structure and formation method of semiconductor device with isolation structure [patent_app_type] => utility [patent_app_number] => 17/886689 [patent_app_country] => US [patent_app_date] => 2022-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 5246 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886689 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/886689
Structure and formation method of semiconductor device with isolation structure Aug 11, 2022 Issued
Array ( [id] => 18975415 [patent_doc_number] => 20240055507 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/819367 [patent_app_country] => US [patent_app_date] => 2022-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3772 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17819367 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/819367
ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT Aug 11, 2022 Pending
Array ( [id] => 18195465 [patent_doc_number] => 20230048984 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => SYSTEM AND METHOD FOR BI-DIRECTIONAL TRENCH POWER SWITCHES [patent_app_type] => utility [patent_app_number] => 17/884803 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8374 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17884803 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/884803
Semiconductor device with bi-directional double-base trench power switches Aug 9, 2022 Issued
Array ( [id] => 18040121 [patent_doc_number] => 20220384338 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => METHOD OF MAKING A CONTACT STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/885026 [patent_app_country] => US [patent_app_date] => 2022-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18734 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17885026 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/885026
Method of making a contact structure Aug 9, 2022 Issued
Array ( [id] => 18688363 [patent_doc_number] => 11784106 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Semiconductor package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/876554 [patent_app_country] => US [patent_app_date] => 2022-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 7611 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876554 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/876554
Semiconductor package and manufacturing method thereof Jul 28, 2022 Issued
Array ( [id] => 20376903 [patent_doc_number] => 12484361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => U-LED, U-LED device, display and method for the same [patent_app_type] => utility [patent_app_number] => 17/815866 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 77 [patent_figures_cnt] => 185 [patent_no_of_words] => 65798 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815866 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815866
U-LED, U-LED device, display and method for the same Jul 27, 2022 Issued
Array ( [id] => 20376903 [patent_doc_number] => 12484361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-25 [patent_title] => U-LED, U-LED device, display and method for the same [patent_app_type] => utility [patent_app_number] => 17/815866 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 77 [patent_figures_cnt] => 185 [patent_no_of_words] => 65798 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815866 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815866
U-LED, U-LED device, display and method for the same Jul 27, 2022 Issued
Array ( [id] => 17994216 [patent_doc_number] => 20220360253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => METHOD FOR FORMING A TIMING CIRCUIT ARRANGEMENTS FOR FLIP-FLOPS [patent_app_type] => utility [patent_app_number] => 17/815156 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17815156 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/815156
Method for forming a timing circuit arrangements for flip-flops Jul 25, 2022 Issued
Array ( [id] => 18929432 [patent_doc_number] => 20240032436 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => MRAM DEVICE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/814245 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5091 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814245 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/814245
MRAM device structure Jul 21, 2022 Issued
Array ( [id] => 18008496 [patent_doc_number] => 20220367263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => Semiconductor Device and Method [patent_app_type] => utility [patent_app_number] => 17/869462 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9605 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869462 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/869462
Contact plug with impurity variation Jul 19, 2022 Issued
Array ( [id] => 18548410 [patent_doc_number] => 11721772 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-08-08 [patent_title] => Varactor with meander diffusion region [patent_app_type] => utility [patent_app_number] => 17/849718 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5133 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849718 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849718
Varactor with meander diffusion region Jun 26, 2022 Issued
Array ( [id] => 20217693 [patent_doc_number] => 12414362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Fins disposed on stacks of nanostructures where the nanostructures are wrapped around by a gate [patent_app_type] => utility [patent_app_number] => 17/849725 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 42 [patent_no_of_words] => 4293 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849725 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849725
Fins disposed on stacks of nanostructures where the nanostructures are wrapped around by a gate Jun 26, 2022 Issued
Array ( [id] => 18866139 [patent_doc_number] => 20230420576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => TRANSIENT VOLTAGE SUPPRESSION DEVICE [patent_app_type] => utility [patent_app_number] => 17/849824 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5147 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849824 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849824
Transient voltage suppression device Jun 26, 2022 Issued
Array ( [id] => 20217693 [patent_doc_number] => 12414362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-09 [patent_title] => Fins disposed on stacks of nanostructures where the nanostructures are wrapped around by a gate [patent_app_type] => utility [patent_app_number] => 17/849725 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 42 [patent_no_of_words] => 4293 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849725 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849725
Fins disposed on stacks of nanostructures where the nanostructures are wrapped around by a gate Jun 26, 2022 Issued
Array ( [id] => 18866680 [patent_doc_number] => 20230421117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => PACKAGES WITH BACKSIDE MOUNTED DIE AND EXPOSED DIE INTERCONNECTS AND METHODS OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/848538 [patent_app_country] => US [patent_app_date] => 2022-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848538 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/848538
PACKAGES WITH BACKSIDE MOUNTED DIE AND EXPOSED DIE INTERCONNECTS AND METHODS OF FABRICATING THE SAME Jun 23, 2022 Pending
Array ( [id] => 18866680 [patent_doc_number] => 20230421117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => PACKAGES WITH BACKSIDE MOUNTED DIE AND EXPOSED DIE INTERCONNECTS AND METHODS OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/848538 [patent_app_country] => US [patent_app_date] => 2022-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848538 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/848538
PACKAGES WITH BACKSIDE MOUNTED DIE AND EXPOSED DIE INTERCONNECTS AND METHODS OF FABRICATING THE SAME Jun 23, 2022 Pending
Array ( [id] => 19356987 [patent_doc_number] => 12057444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Operating voltage-triggered semiconductor controlled rectifier [patent_app_type] => utility [patent_app_number] => 17/808364 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7071 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17808364 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/808364
Operating voltage-triggered semiconductor controlled rectifier Jun 22, 2022 Issued
Array ( [id] => 18238881 [patent_doc_number] => 20230071192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => DISPLAY PANEL, DISPLAY DEVICE, AND METHOD OF MANUFACTURING DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 17/847838 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14596 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -27 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17847838 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/847838
DISPLAY PANEL, DISPLAY DEVICE, AND METHOD OF MANUFACTURING DISPLAY PANEL Jun 22, 2022 Pending
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