Search

Wayneshaobin Zhong

Examiner (ID: 11098, Phone: (571)270-0311 , Office: P/1662 )

Most Active Art Unit
1662
Art Unit(s)
1662
Total Applications
605
Issued Applications
374
Pending Applications
67
Abandoned Applications
176

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2269233 [patent_doc_number] => 04580241 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-04-01 [patent_title] => 'Graphic word spelling correction using automated dictionary comparisons with phonetic skeletons' [patent_app_type] => 1 [patent_app_number] => 6/467834 [patent_app_country] => US [patent_app_date] => 1983-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5822 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/580/04580241.pdf [firstpage_image] =>[orig_patent_app_number] => 467834 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/467834
Graphic word spelling correction using automated dictionary comparisons with phonetic skeletons Feb 17, 1983 Issued
Array ( [id] => 2224896 [patent_doc_number] => 04595995 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-06-17 [patent_title] => 'Sort circuit and method using multiple parallel sorts of the sorted items' [patent_app_type] => 1 [patent_app_number] => 6/467280 [patent_app_country] => US [patent_app_date] => 1983-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5918 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/595/04595995.pdf [firstpage_image] =>[orig_patent_app_number] => 467280 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/467280
Sort circuit and method using multiple parallel sorts of the sorted items Feb 16, 1983 Issued
Array ( [id] => 2247606 [patent_doc_number] => 04567570 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-01-28 [patent_title] => 'Electronic control system for a linearly slanted print head' [patent_app_type] => 1 [patent_app_number] => 6/467040 [patent_app_country] => US [patent_app_date] => 1983-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 7505 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/567/04567570.pdf [firstpage_image] =>[orig_patent_app_number] => 467040 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/467040
Electronic control system for a linearly slanted print head Feb 15, 1983 Issued
Array ( [id] => 2290771 [patent_doc_number] => 04604712 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-08-05 [patent_title] => 'Apparatus for controlling reproduction of text characters whose form depends on adjacency of other characters' [patent_app_type] => 1 [patent_app_number] => 6/461032 [patent_app_country] => US [patent_app_date] => 1983-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 4193 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/604/04604712.pdf [firstpage_image] =>[orig_patent_app_number] => 461032 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/461032
Apparatus for controlling reproduction of text characters whose form depends on adjacency of other characters Jan 25, 1983 Issued
Array ( [id] => 2224708 [patent_doc_number] => 04631668 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-12-23 [patent_title] => 'Storage system using comparison and merger of encached data and update data at buffer to cache to maintain data integrity' [patent_app_type] => 1 [patent_app_number] => 6/460018 [patent_app_country] => US [patent_app_date] => 1983-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4713 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 432 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/631/04631668.pdf [firstpage_image] =>[orig_patent_app_number] => 460018 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/460018
Storage system using comparison and merger of encached data and update data at buffer to cache to maintain data integrity Jan 20, 1983 Issued
06/454800 INTERNAL BLOCK ADDRESS/DATA/INTERRUPT BUS FOR MICROCOMPUTERS Dec 29, 1982 Abandoned
Array ( [id] => 2309089 [patent_doc_number] => 04644467 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-02-17 [patent_title] => 'Multi-level dynamic priority selector groups of data elements' [patent_app_type] => 1 [patent_app_number] => 6/454456 [patent_app_country] => US [patent_app_date] => 1982-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 14823 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/644/04644467.pdf [firstpage_image] =>[orig_patent_app_number] => 454456 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/454456
Multi-level dynamic priority selector groups of data elements Dec 28, 1982 Issued
06/453193 MULTIPLE ADDRESS RANGE COMPARISON Dec 26, 1982 Abandoned
Array ( [id] => 2149710 [patent_doc_number] => 04559595 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-12-17 [patent_title] => 'Distributed priority network logic for allowing a low priority unit to reside in a high priority position' [patent_app_type] => 1 [patent_app_number] => 6/453406 [patent_app_country] => US [patent_app_date] => 1982-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 14953 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 426 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/559/04559595.pdf [firstpage_image] =>[orig_patent_app_number] => 453406 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/453406
Distributed priority network logic for allowing a low priority unit to reside in a high priority position Dec 26, 1982 Issued
06/448099 METHOD FOR TESTING MICROPROGRAMMED I/0 ATTACHMENT Dec 8, 1982 Abandoned
Array ( [id] => 2160788 [patent_doc_number] => 04519048 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-05-21 [patent_title] => 'Postage meter system for communicating platen movement to a microprocessor to signal completion of printing' [patent_app_type] => 1 [patent_app_number] => 6/447904 [patent_app_country] => US [patent_app_date] => 1982-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 32 [patent_no_of_words] => 9343 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/519/04519048.pdf [firstpage_image] =>[orig_patent_app_number] => 447904 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/447904
Postage meter system for communicating platen movement to a microprocessor to signal completion of printing Dec 7, 1982 Issued
Array ( [id] => 2211142 [patent_doc_number] => 04493033 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-01-08 [patent_title] => 'Dual port cache with interleaved read accesses during alternate half-cycles and simultaneous writing' [patent_app_type] => 1 [patent_app_number] => 6/447105 [patent_app_country] => US [patent_app_date] => 1982-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 909 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/493/04493033.pdf [firstpage_image] =>[orig_patent_app_number] => 447105 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/447105
Dual port cache with interleaved read accesses during alternate half-cycles and simultaneous writing Dec 5, 1982 Issued
Array ( [id] => 2148438 [patent_doc_number] => 04506325 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-03-19 [patent_title] => 'Reflexive utilization of descriptors to reconstitute computer instructions which are Huffman-like encoded' [patent_app_type] => 1 [patent_app_number] => 6/441962 [patent_app_country] => US [patent_app_date] => 1982-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 74 [patent_figures_cnt] => 101 [patent_no_of_words] => 20647 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/506/04506325.pdf [firstpage_image] =>[orig_patent_app_number] => 441962 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/441962
Reflexive utilization of descriptors to reconstitute computer instructions which are Huffman-like encoded Nov 14, 1982 Issued
Array ( [id] => 2241366 [patent_doc_number] => 04597056 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1986-06-24 [patent_title] => 'Language translator having circuitry for retrieving full words after single letter input' [patent_app_type] => 1 [patent_app_number] => 6/436932 [patent_app_country] => US [patent_app_date] => 1982-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 3698 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/597/04597056.pdf [firstpage_image] =>[orig_patent_app_number] => 436932 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/436932
Language translator having circuitry for retrieving full words after single letter input Oct 26, 1982 Issued
06/426756 CACHE MEMORY CONTROL SYSTEM Sep 28, 1982 Abandoned
Array ( [id] => 2209797 [patent_doc_number] => 04545031 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-10-01 [patent_title] => 'Photo-electric apparatus for monitoring printed papers' [patent_app_type] => 1 [patent_app_number] => 6/417282 [patent_app_country] => US [patent_app_date] => 1982-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 20 [patent_no_of_words] => 4371 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 44 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/545/04545031.pdf [firstpage_image] =>[orig_patent_app_number] => 417282 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/417282
Photo-electric apparatus for monitoring printed papers Sep 12, 1982 Issued
Array ( [id] => 2133755 [patent_doc_number] => 04543644 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-09-24 [patent_title] => 'Control circuit for matrix-driven recording' [patent_app_type] => 1 [patent_app_number] => 6/416245 [patent_app_country] => US [patent_app_date] => 1982-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 2591 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 252 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/543/04543644.pdf [firstpage_image] =>[orig_patent_app_number] => 416245 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/416245
Control circuit for matrix-driven recording Sep 8, 1982 Issued
Array ( [id] => 2183789 [patent_doc_number] => 04513371 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-04-23 [patent_title] => 'Computer interface apparatus using split-cycle lookahead addressing for faster access to paged memory' [patent_app_type] => 1 [patent_app_number] => 6/402883 [patent_app_country] => US [patent_app_date] => 1982-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3781 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 335 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/513/04513371.pdf [firstpage_image] =>[orig_patent_app_number] => 402883 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/402883
Computer interface apparatus using split-cycle lookahead addressing for faster access to paged memory Jul 28, 1982 Issued
Array ( [id] => 2204175 [patent_doc_number] => 04527233 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1985-07-02 [patent_title] => 'Addressable buffer circuit with address incrementer independently clocked by host computer and external storage device controller' [patent_app_type] => 1 [patent_app_number] => 6/401700 [patent_app_country] => US [patent_app_date] => 1982-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2587 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/527/04527233.pdf [firstpage_image] =>[orig_patent_app_number] => 401700 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/401700
Addressable buffer circuit with address incrementer independently clocked by host computer and external storage device controller Jul 25, 1982 Issued
Array ( [id] => 2363990 [patent_doc_number] => 04658374 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1987-04-14 [patent_title] => 'Alphabetizing Japanese words in a portable electronic language interpreter' [patent_app_type] => 1 [patent_app_number] => 6/396269 [patent_app_country] => US [patent_app_date] => 1982-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4904 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/658/04658374.pdf [firstpage_image] =>[orig_patent_app_number] => 396269 [rel_patent_id] =>[rel_patent_doc_number] =>)
06/396269
Alphabetizing Japanese words in a portable electronic language interpreter Jul 7, 1982 Issued
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