Search

Weilun Lo

Examiner (ID: 2971)

Most Active Art Unit
3402
Art Unit(s)
3748, 3761, 2179, 3402, 3723, 3747, 2899
Total Applications
2327
Issued Applications
2049
Pending Applications
47
Abandoned Applications
225

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18941680 [patent_doc_number] => 20240036819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-01 [patent_title] => COMPUTATIONAL MEMORY FOR SORTING MULTIPLE DATA STREAMS IN PARALLEL [patent_app_type] => utility [patent_app_number] => 18/227835 [patent_app_country] => US [patent_app_date] => 2023-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5923 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18227835 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/227835
COMPUTATIONAL MEMORY FOR SORTING MULTIPLE DATA STREAMS IN PARALLEL Jul 27, 2023 Pending
Array ( [id] => 19426787 [patent_doc_number] => 12086207 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-10 [patent_title] => Mirroring matrices for batched cholesky decomposition on a graphic processing unit [patent_app_type] => utility [patent_app_number] => 18/216926 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4415 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216926 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/216926
Mirroring matrices for batched cholesky decomposition on a graphic processing unit Jun 29, 2023 Issued
Array ( [id] => 18727818 [patent_doc_number] => 20230342111 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-26 [patent_title] => INTEGRATED CIRCUITS WITH MACHINE LEARNING EXTENSIONS [patent_app_type] => utility [patent_app_number] => 18/216797 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8474 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18216797 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/216797
INTEGRATED CIRCUITS WITH MACHINE LEARNING EXTENSIONS Jun 29, 2023 Pending
Array ( [id] => 18711190 [patent_doc_number] => 20230333819 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => ASCII-SEEDED RANDOM NUMBER GENERATOR [patent_app_type] => utility [patent_app_number] => 18/336813 [patent_app_country] => US [patent_app_date] => 2023-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10137 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18336813 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/336813
ASCII-SEEDED RANDOM NUMBER GENERATOR Jun 15, 2023 Pending
Array ( [id] => 18695049 [patent_doc_number] => 20230325467 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => OPTIMIZATION PROBLEM SOLVING CALCULATION APPARATUS [patent_app_type] => utility [patent_app_number] => 18/335274 [patent_app_country] => US [patent_app_date] => 2023-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16189 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 386 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18335274 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/335274
Optimization problem solving calculation apparatus Jun 14, 2023 Issued
Array ( [id] => 18720486 [patent_doc_number] => 11797832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Composing arbitrary convolutional neural network models from a fixed set of duplicate pipelined components [patent_app_type] => utility [patent_app_number] => 18/324335 [patent_app_country] => US [patent_app_date] => 2023-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 63 [patent_figures_cnt] => 74 [patent_no_of_words] => 36866 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 394 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18324335 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/324335
Composing arbitrary convolutional neural network models from a fixed set of duplicate pipelined components May 25, 2023 Issued
Array ( [id] => 18659795 [patent_doc_number] => 20230305802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => Median Value Determination in a Data Processing System [patent_app_type] => utility [patent_app_number] => 18/135715 [patent_app_country] => US [patent_app_date] => 2023-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17489 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18135715 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/135715
Median Value Determination in a Data Processing System Apr 16, 2023 Pending
Array ( [id] => 18539339 [patent_doc_number] => 20230244447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-03 [patent_title] => PROCESSING CORE WITH DATA ASSOCIATIVE ADAPTIVE ROUNDING [patent_app_type] => utility [patent_app_number] => 18/132962 [patent_app_country] => US [patent_app_date] => 2023-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9562 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18132962 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/132962
Processing core with data associative adaptive rounding Apr 9, 2023 Issued
Array ( [id] => 19243706 [patent_doc_number] => 12014150 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Multiple mode arithmetic circuit [patent_app_type] => utility [patent_app_number] => 18/125190 [patent_app_country] => US [patent_app_date] => 2023-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9801 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18125190 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/125190
Multiple mode arithmetic circuit Mar 22, 2023 Issued
Array ( [id] => 18982156 [patent_doc_number] => 11907330 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-20 [patent_title] => Low latency matrix multiply unit [patent_app_type] => utility [patent_app_number] => 18/111468 [patent_app_country] => US [patent_app_date] => 2023-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11302 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18111468 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/111468
Low latency matrix multiply unit Feb 16, 2023 Issued
Array ( [id] => 18454555 [patent_doc_number] => 20230195835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-22 [patent_title] => BIT MATRIX MULTIPLICATION [patent_app_type] => utility [patent_app_number] => 18/083012 [patent_app_country] => US [patent_app_date] => 2022-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19313 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18083012 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/083012
Bit matrix multiplication Dec 15, 2022 Issued
Array ( [id] => 18258008 [patent_doc_number] => 20230085048 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => METHOD AND APPARATUS FOR IMPLIED BIT HANDLING IN FLOATING POINT MULTIPLICATION [patent_app_type] => utility [patent_app_number] => 17/987020 [patent_app_country] => US [patent_app_date] => 2022-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 38846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17987020 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/987020
Method and apparatus for implied bit handling in floating point multiplication Nov 14, 2022 Issued
Array ( [id] => 18486842 [patent_doc_number] => 20230214188 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-06 [patent_title] => SYSTOLIC PARALLEL GALOIS HASH COMPUTING DEVICE [patent_app_type] => utility [patent_app_number] => 17/939654 [patent_app_country] => US [patent_app_date] => 2022-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6416 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17939654 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/939654
SYSTOLIC PARALLEL GALOIS HASH COMPUTING DEVICE Sep 6, 2022 Pending
Array ( [id] => 18991844 [patent_doc_number] => 20240063813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => Predicting Compression Ratio of Data with Compressible Decision [patent_app_type] => utility [patent_app_number] => 17/891389 [patent_app_country] => US [patent_app_date] => 2022-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5906 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891389 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/891389
Predicting compression ratio of data with compressible decision Aug 18, 2022 Issued
Array ( [id] => 18022701 [patent_doc_number] => 20220374200 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => Look Ahead Normaliser [patent_app_type] => utility [patent_app_number] => 17/875747 [patent_app_country] => US [patent_app_date] => 2022-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14088 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17875747 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/875747
Look ahead normaliser Jul 27, 2022 Issued
Array ( [id] => 19475974 [patent_doc_number] => 12106068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-01 [patent_title] => Computational memory for sorting multiple data streams in parallel [patent_app_type] => utility [patent_app_number] => 17/874454 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5923 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874454 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/874454
Computational memory for sorting multiple data streams in parallel Jul 26, 2022 Issued
Array ( [id] => 18161468 [patent_doc_number] => 20230028060 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => SPLIT AND DUPLICATE RIPPLE CIRCUITS [patent_app_type] => utility [patent_app_number] => 17/873862 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13884 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873862 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/873862
Split and duplicate ripple circuits Jul 25, 2022 Issued
Array ( [id] => 18803305 [patent_doc_number] => 11836464 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-12-05 [patent_title] => Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits [patent_app_type] => utility [patent_app_number] => 17/839905 [patent_app_country] => US [patent_app_date] => 2022-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 22 [patent_no_of_words] => 15251 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17839905 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/839905
Method and apparatus for efficient binary and ternary support in fused multiply-add (FMA) circuits Jun 13, 2022 Issued
Array ( [id] => 18445931 [patent_doc_number] => 11681500 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-20 [patent_title] => ASCII-seeded random number generator [patent_app_type] => utility [patent_app_number] => 17/825103 [patent_app_country] => US [patent_app_date] => 2022-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10167 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 376 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17825103 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/825103
ASCII-seeded random number generator May 25, 2022 Issued
Array ( [id] => 17962593 [patent_doc_number] => 20220343174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-27 [patent_title] => OPTIMIZED COMPUTE HARDWARE FOR MACHINE LEARNING OPERATIONS [patent_app_type] => utility [patent_app_number] => 17/742581 [patent_app_country] => US [patent_app_date] => 2022-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 34534 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17742581 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/742581
OPTIMIZED COMPUTE HARDWARE FOR MACHINE LEARNING OPERATIONS May 11, 2022 Pending
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