Weilun Lo
Examiner (ID: 2971)
Most Active Art Unit | 3402 |
Art Unit(s) | 3748, 3761, 2179, 3402, 3723, 3747, 2899 |
Total Applications | 2327 |
Issued Applications | 2049 |
Pending Applications | 47 |
Abandoned Applications | 225 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 16630579
[patent_doc_number] => 20210049232
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-18
[patent_title] => COMPRESSION-ENCODING SCHEDULED INPUTS FOR MATRIX COMPUTATIONS
[patent_app_type] => utility
[patent_app_number] => 17/085337
[patent_app_country] => US
[patent_app_date] => 2020-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11600
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17085337
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/085337 | Compression-encoding scheduled inputs for matrix computations | Oct 29, 2020 | Issued |
Array
(
[id] => 17447025
[patent_doc_number] => 20220067530
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-03
[patent_title] => FINE-GRAINED PER-VECTOR SCALING FOR NEURAL NETWORK QUANTIZATION
[patent_app_type] => utility
[patent_app_number] => 17/086118
[patent_app_country] => US
[patent_app_date] => 2020-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 21731
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17086118
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/086118 | Fine-grained per-vector scaling for neural network quantization | Oct 29, 2020 | Issued |
Array
(
[id] => 18506278
[patent_doc_number] => 11704092
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-18
[patent_title] => High-precision anchored-implicit processing
[patent_app_type] => utility
[patent_app_number] => 17/081068
[patent_app_country] => US
[patent_app_date] => 2020-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 7669
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17081068
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/081068 | High-precision anchored-implicit processing | Oct 26, 2020 | Issued |
Array
(
[id] => 19538695
[patent_doc_number] => 12131249
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-29
[patent_title] => Arithmetic devices with look-up table for neural network
[patent_app_type] => utility
[patent_app_number] => 17/076428
[patent_app_country] => US
[patent_app_date] => 2020-10-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 36
[patent_no_of_words] => 16374
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17076428
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/076428 | Arithmetic devices with look-up table for neural network | Oct 20, 2020 | Issued |
Array
(
[id] => 19244970
[patent_doc_number] => 12015428
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-18
[patent_title] => MAC processing pipeline using filter weights having enhanced dynamic range, and methods of operating same
[patent_app_type] => utility
[patent_app_number] => 17/074670
[patent_app_country] => US
[patent_app_date] => 2020-10-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 31
[patent_no_of_words] => 21573
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17074670
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/074670 | MAC processing pipeline using filter weights having enhanced dynamic range, and methods of operating same | Oct 19, 2020 | Issued |
Array
(
[id] => 17636752
[patent_doc_number] => 11347476
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-31
[patent_title] => Digital filtering using combined approximate summation of partial products
[patent_app_type] => utility
[patent_app_number] => 17/067056
[patent_app_country] => US
[patent_app_date] => 2020-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 20
[patent_no_of_words] => 6877
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17067056
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/067056 | Digital filtering using combined approximate summation of partial products | Oct 8, 2020 | Issued |
Array
(
[id] => 17528525
[patent_doc_number] => 11301212
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-04-12
[patent_title] => Multimodal digital multiplication circuits and methods
[patent_app_type] => utility
[patent_app_number] => 17/060621
[patent_app_country] => US
[patent_app_date] => 2020-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 11
[patent_no_of_words] => 4981
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17060621
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/060621 | Multimodal digital multiplication circuits and methods | Sep 30, 2020 | Issued |
Array
(
[id] => 17522142
[patent_doc_number] => 20220107991
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-07
[patent_title] => FAST PCA OF EVOLVING DATA USING ANALOG CROSSBAR ARRAY
[patent_app_type] => utility
[patent_app_number] => 17/060883
[patent_app_country] => US
[patent_app_date] => 2020-10-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7042
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17060883
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/060883 | Fast PCA of evolving data using analog crossbar array | Sep 30, 2020 | Issued |
Array
(
[id] => 17507371
[patent_doc_number] => 20220100474
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-31
[patent_title] => DETECTION OF UNINTENDED DEPENDENCIES IN HARDWARE DESIGNS WITH PSEUDO-RANDOM NUMBER GENERATORS
[patent_app_type] => utility
[patent_app_number] => 17/035794
[patent_app_country] => US
[patent_app_date] => 2020-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14047
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17035794
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/035794 | Detection of unintended dependencies in hardware designs with pseudo-random number generators | Sep 28, 2020 | Issued |
Array
(
[id] => 16732026
[patent_doc_number] => 20210099174
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-01
[patent_title] => Determining Sums Using Logic Circuits
[patent_app_type] => utility
[patent_app_number] => 17/029712
[patent_app_country] => US
[patent_app_date] => 2020-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9889
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17029712
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/029712 | Determining sums using logic circuits | Sep 22, 2020 | Issued |
Array
(
[id] => 17113975
[patent_doc_number] => 20210294572
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-23
[patent_title] => ARITHMETIC CIRCUITRY
[patent_app_type] => utility
[patent_app_number] => 17/021315
[patent_app_country] => US
[patent_app_date] => 2020-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5847
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17021315
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/021315 | Arithmetic circuitry for power-efficient multiply-add operations | Sep 14, 2020 | Issued |
Array
(
[id] => 17009934
[patent_doc_number] => 20210241095
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-08-05
[patent_title] => DEEP LEARNING PROCESSING APPARATUS AND METHOD, DEVICE AND STORAGE MEDIUM
[patent_app_type] => utility
[patent_app_number] => 17/017600
[patent_app_country] => US
[patent_app_date] => 2020-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9424
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 77
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17017600
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/017600 | Deep learning processing apparatus and method, device and storage medium | Sep 9, 2020 | Issued |
Array
(
[id] => 16690476
[patent_doc_number] => 20210072954
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-11
[patent_title] => RECONFIGURABLE ARITHMETIC ENGINE CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 17/015950
[patent_app_country] => US
[patent_app_date] => 2020-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 53650
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -35
[patent_words_short_claim] => 44
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17015950
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/015950 | Reconfigurable arithmetic engine circuit | Sep 8, 2020 | Issued |
Array
(
[id] => 18644595
[patent_doc_number] => 11768663
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-09-26
[patent_title] => Compaction of multiplier and adder circuits
[patent_app_type] => utility
[patent_app_number] => 17/014410
[patent_app_country] => US
[patent_app_date] => 2020-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 17
[patent_no_of_words] => 7233
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17014410
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/014410 | Compaction of multiplier and adder circuits | Sep 7, 2020 | Issued |
Array
(
[id] => 16527297
[patent_doc_number] => 20200401377
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-24
[patent_title] => Decentralized Random Number Generator
[patent_app_type] => utility
[patent_app_number] => 17/013299
[patent_app_country] => US
[patent_app_date] => 2020-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11762
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 90
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17013299
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/013299 | Decentralized random number generator | Sep 3, 2020 | Issued |
Array
(
[id] => 16515249
[patent_doc_number] => 20200394507
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-17
[patent_title] => DATA PROCESSING CIRCUIT FOR NEURAL NETWORK
[patent_app_type] => utility
[patent_app_number] => 17/005488
[patent_app_country] => US
[patent_app_date] => 2020-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10744
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17005488
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/005488 | Data processing circuit for neural network | Aug 27, 2020 | Issued |
Array
(
[id] => 17331364
[patent_doc_number] => 11221827
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-01-11
[patent_title] => In-memory computation device
[patent_app_type] => utility
[patent_app_number] => 17/006493
[patent_app_country] => US
[patent_app_date] => 2020-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 3639
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17006493
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/006493 | In-memory computation device | Aug 27, 2020 | Issued |
Array
(
[id] => 17446232
[patent_doc_number] => 20220066737
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-03
[patent_title] => TANH AND SIGMOID FUNCTION EXECUTION
[patent_app_type] => utility
[patent_app_number] => 17/003334
[patent_app_country] => US
[patent_app_date] => 2020-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 24832
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 36
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17003334
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/003334 | TANH AND SIGMOID FUNCTION EXECUTION | Aug 25, 2020 | Pending |
Array
(
[id] => 16630332
[patent_doc_number] => 20210048985
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-18
[patent_title] => SELF-TIMED RANDOM NUMBER GENERATOR
[patent_app_type] => utility
[patent_app_number] => 17/000121
[patent_app_country] => US
[patent_app_date] => 2020-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8609
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17000121
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/000121 | Self-timed random number generator | Aug 20, 2020 | Issued |
Array
(
[id] => 18918148
[patent_doc_number] => 11880427
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-23
[patent_title] => Time-series data processing method, corresponding processing system, device and computer program product
[patent_app_type] => utility
[patent_app_number] => 16/998810
[patent_app_country] => US
[patent_app_date] => 2020-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 8358
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 441
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16998810
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/998810 | Time-series data processing method, corresponding processing system, device and computer program product | Aug 19, 2020 | Issued |