Search

Wensing W. Kuo

Examiner (ID: 17009)

Most Active Art Unit
2826
Art Unit(s)
2826
Total Applications
470
Issued Applications
358
Pending Applications
5
Abandoned Applications
110

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7699407 [patent_doc_number] => 20110227183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-22 [patent_title] => 'PHOTODIODE ARRAY' [patent_app_type] => utility [patent_app_number] => 13/116525 [patent_app_country] => US [patent_app_date] => 2011-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8406 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20110227183.pdf [firstpage_image] =>[orig_patent_app_number] => 13116525 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/116525
Photodiode array including channel surrounding part May 25, 2011 Issued
Array ( [id] => 6042424 [patent_doc_number] => 20110204501 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM INCLUDING NON-LEADED PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/100768 [patent_app_country] => US [patent_app_date] => 2011-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6290 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0204/20110204501.pdf [firstpage_image] =>[orig_patent_app_number] => 13100768 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/100768
INTEGRATED CIRCUIT PACKAGING SYSTEM INCLUDING NON-LEADED PACKAGE May 3, 2011 Abandoned
Array ( [id] => 9608840 [patent_doc_number] => 08786010 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-22 [patent_title] => 'Superjunction structures for power devices and methods of manufacture' [patent_app_type] => utility [patent_app_number] => 13/095664 [patent_app_country] => US [patent_app_date] => 2011-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 80 [patent_no_of_words] => 18362 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13095664 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/095664
Superjunction structures for power devices and methods of manufacture Apr 26, 2011 Issued
Array ( [id] => 7706601 [patent_doc_number] => 20120001286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-05 [patent_title] => 'IMAGE SENSOR AND PACKAGE INCLUDING THE IMAGE SENSOR' [patent_app_type] => utility [patent_app_number] => 13/095232 [patent_app_country] => US [patent_app_date] => 2011-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 14630 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13095232 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/095232
Image sensor including a light shielding pattern Apr 26, 2011 Issued
Array ( [id] => 5955834 [patent_doc_number] => 20110180881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'INTEGRATION SCHEME FOR REDUCING BORDER REGION MORPHOLOGY IN HYBRID ORIENTATION TECHNOLOGY (HOT) USING DIRECT SILICON BONDED (DSB) SUBSTRATES' [patent_app_type] => utility [patent_app_number] => 13/082129 [patent_app_country] => US [patent_app_date] => 2011-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3830 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20110180881.pdf [firstpage_image] =>[orig_patent_app_number] => 13082129 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/082129
INTEGRATION SCHEME FOR REDUCING BORDER REGION MORPHOLOGY IN HYBRID ORIENTATION TECHNOLOGY (HOT) USING DIRECT SILICON BONDED (DSB) SUBSTRATES Apr 6, 2011 Abandoned
Array ( [id] => 9883163 [patent_doc_number] => 08969930 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-03 [patent_title] => 'Gate stack structure, semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/321886 [patent_app_country] => US [patent_app_date] => 2011-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 21 [patent_no_of_words] => 7757 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13321886 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/321886
Gate stack structure, semiconductor device and method for manufacturing the same Apr 5, 2011 Issued
Array ( [id] => 6161792 [patent_doc_number] => 20110159622 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING A DISPLAY PANEL' [patent_app_type] => utility [patent_app_number] => 13/042348 [patent_app_country] => US [patent_app_date] => 2011-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7363 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0159/20110159622.pdf [firstpage_image] =>[orig_patent_app_number] => 13042348 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/042348
Thin film transistor having improved manufacturability and method for manufacturing a display panel containing same Mar 6, 2011 Issued
Array ( [id] => 8192764 [patent_doc_number] => 20120119225 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-17 [patent_title] => 'SILICON CARBIDE SUBSTRATE, EPITAXIAL LAYER PROVIDED SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/322089 [patent_app_country] => US [patent_app_date] => 2011-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12529 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20120119225.pdf [firstpage_image] =>[orig_patent_app_number] => 13322089 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/322089
SILICON CARBIDE SUBSTRATE, EPITAXIAL LAYER PROVIDED SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING SILICON CARBIDE SUBSTRATE Feb 20, 2011 Abandoned
Array ( [id] => 7750357 [patent_doc_number] => 20120025243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'LED PACKAGE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/029125 [patent_app_country] => US [patent_app_date] => 2011-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1640 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20120025243.pdf [firstpage_image] =>[orig_patent_app_number] => 13029125 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/029125
LED package with bounding dam surrounding LED chip and thermoset encapsulation enclosing LED chip and method for manufacturing the same Feb 16, 2011 Issued
Array ( [id] => 8237265 [patent_doc_number] => 20120146003 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-14 [patent_title] => 'THIN FILM TRANSISTOR HAVING SCHOTTKY BARRIER' [patent_app_type] => utility [patent_app_number] => 13/029101 [patent_app_country] => US [patent_app_date] => 2011-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2920 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13029101 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/029101
Thin film transistor having Schottky barrier Feb 15, 2011 Issued
Array ( [id] => 8249063 [patent_doc_number] => 20120153383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-21 [patent_title] => 'SEMICONDUCTOR DEVICE WITH BURIED GATE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/028556 [patent_app_country] => US [patent_app_date] => 2011-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 5226 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20120153383.pdf [firstpage_image] =>[orig_patent_app_number] => 13028556 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/028556
SEMICONDUCTOR DEVICE WITH BURIED GATE AND METHOD FOR FABRICATING THE SAME Feb 15, 2011 Abandoned
Array ( [id] => 9312389 [patent_doc_number] => 08653611 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-02-18 [patent_title] => 'Semiconductor device with metal gates and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/027379 [patent_app_country] => US [patent_app_date] => 2011-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 6154 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13027379 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/027379
Semiconductor device with metal gates and method for fabricating the same Feb 14, 2011 Issued
Array ( [id] => 8344695 [patent_doc_number] => 20120205616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'DEFECT-CONTROLLING STRUCTURE FOR EPITAXIAL GROWTH, LIGHT EMITTING DEVICE CONTAINING DEFECT-CONTROLLING STRUCTURE, AND METHOD OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/028055 [patent_app_country] => US [patent_app_date] => 2011-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5187 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13028055 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/028055
Defect-controlling structure for epitaxial growth, light emitting device containing defect-controlling structure, and method of forming the same Feb 14, 2011 Issued
Array ( [id] => 8834985 [patent_doc_number] => 08450742 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-28 [patent_title] => 'Thin film transistor having semiconductor with different crystallinities and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/026403 [patent_app_country] => US [patent_app_date] => 2011-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 29 [patent_no_of_words] => 11415 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13026403 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026403
Thin film transistor having semiconductor with different crystallinities and manufacturing method thereof Feb 13, 2011 Issued
Array ( [id] => 9345581 [patent_doc_number] => 08664731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Strengthened micro-electromechanical system devices and methods of making thereof' [patent_app_type] => utility [patent_app_number] => 13/027199 [patent_app_country] => US [patent_app_date] => 2011-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 26 [patent_no_of_words] => 6152 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13027199 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/027199
Strengthened micro-electromechanical system devices and methods of making thereof Feb 13, 2011 Issued
Array ( [id] => 9047292 [patent_doc_number] => 08541846 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-24 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/026525 [patent_app_country] => US [patent_app_date] => 2011-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 53 [patent_no_of_words] => 16457 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13026525 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/026525
Semiconductor device Feb 13, 2011 Issued
Array ( [id] => 9127741 [patent_doc_number] => 08575692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-05 [patent_title] => 'Near zero channel length field drift LDMOS' [patent_app_type] => utility [patent_app_number] => 13/025350 [patent_app_country] => US [patent_app_date] => 2011-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 11368 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13025350 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/025350
Near zero channel length field drift LDMOS Feb 10, 2011 Issued
Array ( [id] => 8344857 [patent_doc_number] => 20120205776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'DUAL CONTACT TRENCH RESISTOR IN SHALLOW TRENCH ISOLATION (STI) AND METHODS OF MANUFACTURE' [patent_app_type] => utility [patent_app_number] => 13/025501 [patent_app_country] => US [patent_app_date] => 2011-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5690 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13025501 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/025501
Dual contact trench resistor in shallow trench isolation (STI) and methods of manufacture Feb 10, 2011 Issued
Array ( [id] => 6143550 [patent_doc_number] => 20110129952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'THIN FILM TRANSISTOR SUBSTRATES AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/024898 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 4990 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0129/20110129952.pdf [firstpage_image] =>[orig_patent_app_number] => 13024898 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/024898
Method of manufacturing thin film transistor substrate Feb 9, 2011 Issued
Array ( [id] => 8344737 [patent_doc_number] => 20120205666 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'JUNCTION TERMINATION STRUCTURES INCLUDING GUARD RING EXTENSIONS AND METHODS OF FABRICATING ELECTRONIC DEVICES INCORPORATING SAME' [patent_app_type] => utility [patent_app_number] => 13/024812 [patent_app_country] => US [patent_app_date] => 2011-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5709 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13024812 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/024812
Junction termination structures including guard ring extensions and methods of fabricating electronic devices incorporating same Feb 9, 2011 Issued
Menu