
Whitney Moore
Examiner (ID: 19293, Phone: (571)270-3338 , Office: P/2826 )
| Most Active Art Unit | 2826 |
| Art Unit(s) | 2826, 4148, 3646 |
| Total Applications | 1392 |
| Issued Applications | 1180 |
| Pending Applications | 84 |
| Abandoned Applications | 144 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 72603
[patent_doc_number] => 07755094
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-07-13
[patent_title] => 'Semiconductor light emitting device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 12/144187
[patent_app_country] => US
[patent_app_date] => 2008-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3555
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/755/07755094.pdf
[firstpage_image] =>[orig_patent_app_number] => 12144187
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/144187 | Semiconductor light emitting device and method of manufacturing the same | Jun 22, 2008 | Issued |
Array
(
[id] => 4570039
[patent_doc_number] => 07847308
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-12-07
[patent_title] => 'Semiconductor light emitting device'
[patent_app_type] => utility
[patent_app_number] => 12/144448
[patent_app_country] => US
[patent_app_date] => 2008-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 3631
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/847/07847308.pdf
[firstpage_image] =>[orig_patent_app_number] => 12144448
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/144448 | Semiconductor light emitting device | Jun 22, 2008 | Issued |
Array
(
[id] => 93175
[patent_doc_number] => 07737567
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-06-15
[patent_title] => 'Method and apparatus for wafer marking'
[patent_app_type] => utility
[patent_app_number] => 12/143197
[patent_app_country] => US
[patent_app_date] => 2008-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 5795
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/737/07737567.pdf
[firstpage_image] =>[orig_patent_app_number] => 12143197
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/143197 | Method and apparatus for wafer marking | Jun 19, 2008 | Issued |
Array
(
[id] => 8018171
[patent_doc_number] => 08138590
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-03-20
[patent_title] => 'Integrated circuit package system with wire-in-film encapsulation'
[patent_app_type] => utility
[patent_app_number] => 12/143047
[patent_app_country] => US
[patent_app_date] => 2008-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 2896
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/138/08138590.pdf
[firstpage_image] =>[orig_patent_app_number] => 12143047
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/143047 | Integrated circuit package system with wire-in-film encapsulation | Jun 19, 2008 | Issued |
Array
(
[id] => 5366228
[patent_doc_number] => 20090303787
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-10
[patent_title] => 'NONVOLATILE MEMORIES WITH TUNNEL DIELECTRIC WITH CHLORINE'
[patent_app_type] => utility
[patent_app_number] => 12/134834
[patent_app_country] => US
[patent_app_date] => 2008-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2247
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0303/20090303787.pdf
[firstpage_image] =>[orig_patent_app_number] => 12134834
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/134834 | Nonvolatile memories with tunnel dielectric with chlorine | Jun 5, 2008 | Issued |
Array
(
[id] => 5307493
[patent_doc_number] => 20090014774
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-15
[patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT AND NONVOLATILE SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/134533
[patent_app_country] => US
[patent_app_date] => 2008-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 29
[patent_figures_cnt] => 29
[patent_no_of_words] => 20934
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0014/20090014774.pdf
[firstpage_image] =>[orig_patent_app_number] => 12134533
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/134533 | NONVOLATILE SEMICONDUCTOR MEMORY ELEMENT AND NONVOLATILE SEMICONDUCTOR MEMORY DEVICE | Jun 5, 2008 | Abandoned |
Array
(
[id] => 23323
[patent_doc_number] => 07800197
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-09-21
[patent_title] => 'Semiconductor device and method of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 12/134144
[patent_app_country] => US
[patent_app_date] => 2008-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2964
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/800/07800197.pdf
[firstpage_image] =>[orig_patent_app_number] => 12134144
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/134144 | Semiconductor device and method of fabricating the same | Jun 4, 2008 | Issued |
Array
(
[id] => 4946920
[patent_doc_number] => 20080303046
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-11
[patent_title] => 'SEMICONDUCTOR LIGHT EMITTING DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/133604
[patent_app_country] => US
[patent_app_date] => 2008-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 5202
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0303/20080303046.pdf
[firstpage_image] =>[orig_patent_app_number] => 12133604
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/133604 | Semiconductor light emitting device | Jun 4, 2008 | Issued |
Array
(
[id] => 8155350
[patent_doc_number] => 08170077
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-05-01
[patent_title] => 'Internal memory for transistor outline packages'
[patent_app_type] => utility
[patent_app_number] => 12/133101
[patent_app_country] => US
[patent_app_date] => 2008-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 3679
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/170/08170077.pdf
[firstpage_image] =>[orig_patent_app_number] => 12133101
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/133101 | Internal memory for transistor outline packages | Jun 3, 2008 | Issued |
Array
(
[id] => 4947842
[patent_doc_number] => 20080303968
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-11
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/133362
[patent_app_country] => US
[patent_app_date] => 2008-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 38
[patent_figures_cnt] => 38
[patent_no_of_words] => 22575
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0303/20080303968.pdf
[firstpage_image] =>[orig_patent_app_number] => 12133362
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/133362 | Semiconductor device and method of manufacturing the same | Jun 3, 2008 | Issued |
Array
(
[id] => 4604632
[patent_doc_number] => 07985612
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-07-26
[patent_title] => 'Method and device for reducing crosstalk in back illuminated imagers'
[patent_app_type] => utility
[patent_app_number] => 12/132721
[patent_app_country] => US
[patent_app_date] => 2008-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 4547
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/985/07985612.pdf
[firstpage_image] =>[orig_patent_app_number] => 12132721
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/132721 | Method and device for reducing crosstalk in back illuminated imagers | Jun 3, 2008 | Issued |
Array
(
[id] => 4644897
[patent_doc_number] => 08022503
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-09-20
[patent_title] => 'Anti-fusse structure and method of fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 12/132111
[patent_app_country] => US
[patent_app_date] => 2008-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 13
[patent_no_of_words] => 4047
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/022/08022503.pdf
[firstpage_image] =>[orig_patent_app_number] => 12132111
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/132111 | Anti-fusse structure and method of fabricating the same | Jun 2, 2008 | Issued |
Array
(
[id] => 7763571
[patent_doc_number] => 08115276
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-02-14
[patent_title] => 'Integrated circuit system employing back end of line via techniques'
[patent_app_type] => utility
[patent_app_number] => 12/132342
[patent_app_country] => US
[patent_app_date] => 2008-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 17
[patent_no_of_words] => 9437
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/115/08115276.pdf
[firstpage_image] =>[orig_patent_app_number] => 12132342
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/132342 | Integrated circuit system employing back end of line via techniques | Jun 2, 2008 | Issued |
Array
(
[id] => 4946931
[patent_doc_number] => 20080303057
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-11
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/131114
[patent_app_country] => US
[patent_app_date] => 2008-06-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 9719
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0303/20080303057.pdf
[firstpage_image] =>[orig_patent_app_number] => 12131114
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/131114 | Semiconductor device and method of manufacturing thereof | May 31, 2008 | Issued |
Array
(
[id] => 7519208
[patent_doc_number] => 07973311
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-07-05
[patent_title] => 'Isolated sensor structures such as for flexible substrates'
[patent_app_type] => utility
[patent_app_number] => 12/130261
[patent_app_country] => US
[patent_app_date] => 2008-05-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3627
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/973/07973311.pdf
[firstpage_image] =>[orig_patent_app_number] => 12130261
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/130261 | Isolated sensor structures such as for flexible substrates | May 29, 2008 | Issued |
Array
(
[id] => 4708163
[patent_doc_number] => 20080296689
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-04
[patent_title] => 'Nanotube dual gate transistor and method of operating the same'
[patent_app_type] => utility
[patent_app_number] => 12/128812
[patent_app_country] => US
[patent_app_date] => 2008-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3253
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0296/20080296689.pdf
[firstpage_image] =>[orig_patent_app_number] => 12128812
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/128812 | Nanotube dual gate transistor and method of operating the same | May 28, 2008 | Abandoned |
Array
(
[id] => 4536143
[patent_doc_number] => 07872257
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-01-18
[patent_title] => 'Organic thin film transistor array and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 12/128993
[patent_app_country] => US
[patent_app_date] => 2008-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 5711
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/872/07872257.pdf
[firstpage_image] =>[orig_patent_app_number] => 12128993
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/128993 | Organic thin film transistor array and method of manufacturing the same | May 28, 2008 | Issued |
Array
(
[id] => 4816957
[patent_doc_number] => 20080224216
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-09-18
[patent_title] => 'STRAINED HOT (HYBRID OREINTATION TECHNOLOGY) MOSFETs'
[patent_app_type] => utility
[patent_app_number] => 12/128653
[patent_app_country] => US
[patent_app_date] => 2008-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 3316
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0224/20080224216.pdf
[firstpage_image] =>[orig_patent_app_number] => 12128653
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/128653 | STRAINED HOT (HYBRID OREINTATION TECHNOLOGY) MOSFETs | May 28, 2008 | Abandoned |
Array
(
[id] => 81555
[patent_doc_number] => 07745320
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-06-29
[patent_title] => 'Method for reducing silicide defects in integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 12/124177
[patent_app_country] => US
[patent_app_date] => 2008-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 2662
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/745/07745320.pdf
[firstpage_image] =>[orig_patent_app_number] => 12124177
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/124177 | Method for reducing silicide defects in integrated circuits | May 20, 2008 | Issued |
Array
(
[id] => 5549935
[patent_doc_number] => 20090283921
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-11-19
[patent_title] => 'CONTACT LAYOUT STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 12/122733
[patent_app_country] => US
[patent_app_date] => 2008-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2093
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0283/20090283921.pdf
[firstpage_image] =>[orig_patent_app_number] => 12122733
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/122733 | Contact layout structure | May 18, 2008 | Issued |