Search

William A. Luther

Examiner (ID: 14002)

Most Active Art Unit
2731
Art Unit(s)
2616, 2667, 2614, 2607, 2731, 2664
Total Applications
411
Issued Applications
321
Pending Applications
46
Abandoned Applications
44

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5925955 [patent_doc_number] => 20020116429 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'System and method for modular multiplication' [patent_app_type] => new [patent_app_number] => 09/740367 [patent_app_country] => US [patent_app_date] => 2000-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 22773 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20020116429.pdf [firstpage_image] =>[orig_patent_app_number] => 09740367 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/740367
System and method for modular multiplication Dec 18, 2000 Abandoned
Array ( [id] => 6563146 [patent_doc_number] => 20020111978 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-15 [patent_title] => 'Approximate inverse discrete cosine transform for scalable computation complexity video and still image decoding' [patent_app_type] => new [patent_app_number] => 09/741724 [patent_app_country] => US [patent_app_date] => 2000-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3653 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20020111978.pdf [firstpage_image] =>[orig_patent_app_number] => 09741724 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/741724
Approximate inverse discrete cosine transform for scalable computation complexity video and still image decoding Dec 18, 2000 Issued
Array ( [id] => 1164661 [patent_doc_number] => 06772184 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-08-03 [patent_title] => 'Method for efficient modular division over prime integer fields' [patent_app_type] => B2 [patent_app_number] => 09/734972 [patent_app_country] => US [patent_app_date] => 2000-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5917 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/772/06772184.pdf [firstpage_image] =>[orig_patent_app_number] => 09734972 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/734972
Method for efficient modular division over prime integer fields Dec 10, 2000 Issued
Array ( [id] => 6741510 [patent_doc_number] => 20030158879 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-08-21 [patent_title] => 'Pre-reduction technique within a multiplier/accumulator architecture' [patent_app_type] => new [patent_app_number] => 09/733720 [patent_app_country] => US [patent_app_date] => 2000-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3709 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0158/20030158879.pdf [firstpage_image] =>[orig_patent_app_number] => 09733720 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/733720
Pre-reduction technique within a multiplier/accumulator architecture Dec 10, 2000 Issued
Array ( [id] => 6019490 [patent_doc_number] => 20020103842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-01 [patent_title] => 'Adder with improved overflow flag generation' [patent_app_type] => new [patent_app_number] => 09/733686 [patent_app_country] => US [patent_app_date] => 2000-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3151 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20020103842.pdf [firstpage_image] =>[orig_patent_app_number] => 09733686 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/733686
Adder with improved overflow flag generation Dec 7, 2000 Issued
Array ( [id] => 6019488 [patent_doc_number] => 20020103841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-01 [patent_title] => 'Dynamically configurable processor' [patent_app_type] => new [patent_app_number] => 09/726188 [patent_app_country] => US [patent_app_date] => 2001-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4468 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0103/20020103841.pdf [firstpage_image] =>[orig_patent_app_number] => 09726188 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/726188
Dynamically configurable processor Nov 28, 2000 Issued
09/647756 Novel equalizer using box-car filters Nov 19, 2000 Abandoned
Array ( [id] => 1154421 [patent_doc_number] => 06779006 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-08-17 [patent_title] => 'Performing dependent subtraction on arithmetic intervals within a computer system' [patent_app_type] => B1 [patent_app_number] => 09/710080 [patent_app_country] => US [patent_app_date] => 2000-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4263 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/779/06779006.pdf [firstpage_image] =>[orig_patent_app_number] => 09710080 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/710080
Performing dependent subtraction on arithmetic intervals within a computer system Nov 8, 2000 Issued
Array ( [id] => 7605815 [patent_doc_number] => 07099907 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-29 [patent_title] => 'Fir filter and ramp-up/-down control circuit using the same' [patent_app_type] => utility [patent_app_number] => 09/705050 [patent_app_country] => US [patent_app_date] => 2000-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4778 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/099/07099907.pdf [firstpage_image] =>[orig_patent_app_number] => 09705050 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/705050
Fir filter and ramp-up/-down control circuit using the same Nov 1, 2000 Issued
Array ( [id] => 4555036 [patent_doc_number] => 07890566 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-02-15 [patent_title] => 'Microprocessor with rounding dot product instruction' [patent_app_type] => utility [patent_app_number] => 09/703034 [patent_app_country] => US [patent_app_date] => 2000-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8944 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 292 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/890/07890566.pdf [firstpage_image] =>[orig_patent_app_number] => 09703034 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/703034
Microprocessor with rounding dot product instruction Oct 30, 2000 Issued
Array ( [id] => 517502 [patent_doc_number] => 07203718 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-04-10 [patent_title] => 'Apparatus and method for angle rotation' [patent_app_type] => utility [patent_app_number] => 09/698246 [patent_app_country] => US [patent_app_date] => 2000-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 64 [patent_figures_cnt] => 97 [patent_no_of_words] => 44765 [patent_no_of_claims] => 71 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/203/07203718.pdf [firstpage_image] =>[orig_patent_app_number] => 09698246 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/698246
Apparatus and method for angle rotation Oct 29, 2000 Issued
Array ( [id] => 1248692 [patent_doc_number] => 06678707 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-01-13 [patent_title] => 'Generation of cryptographically strong random numbers using MISRs' [patent_app_type] => B1 [patent_app_number] => 09/699884 [patent_app_country] => US [patent_app_date] => 2000-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 6121 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/678/06678707.pdf [firstpage_image] =>[orig_patent_app_number] => 09699884 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/699884
Generation of cryptographically strong random numbers using MISRs Oct 29, 2000 Issued
Array ( [id] => 752595 [patent_doc_number] => 07028063 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-11 [patent_title] => 'Method and apparatus for a DFT/IDFT engine supporting multiple X-DSL protocols' [patent_app_type] => utility [patent_app_number] => 09/698824 [patent_app_country] => US [patent_app_date] => 2000-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 24 [patent_no_of_words] => 12372 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/028/07028063.pdf [firstpage_image] =>[orig_patent_app_number] => 09698824 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/698824
Method and apparatus for a DFT/IDFT engine supporting multiple X-DSL protocols Oct 25, 2000 Issued
Array ( [id] => 1185530 [patent_doc_number] => 06745216 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-01 [patent_title] => 'Shift register allowing direct data insertion' [patent_app_type] => B1 [patent_app_number] => 09/696027 [patent_app_country] => US [patent_app_date] => 2000-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4218 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/745/06745216.pdf [firstpage_image] =>[orig_patent_app_number] => 09696027 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/696027
Shift register allowing direct data insertion Oct 25, 2000 Issued
Array ( [id] => 1058875 [patent_doc_number] => 06857002 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-02-15 [patent_title] => 'Integrated circuit with a mode control selecting settled and unsettled output from a filter' [patent_app_type] => utility [patent_app_number] => 09/695704 [patent_app_country] => US [patent_app_date] => 2000-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 34 [patent_no_of_words] => 6056 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/857/06857002.pdf [firstpage_image] =>[orig_patent_app_number] => 09695704 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/695704
Integrated circuit with a mode control selecting settled and unsettled output from a filter Oct 24, 2000 Issued
Array ( [id] => 1138591 [patent_doc_number] => 06789098 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-07 [patent_title] => 'Method, data processing system and computer program for comparing floating point numbers' [patent_app_type] => B1 [patent_app_number] => 09/693974 [patent_app_country] => US [patent_app_date] => 2000-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7276 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/789/06789098.pdf [firstpage_image] =>[orig_patent_app_number] => 09693974 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/693974
Method, data processing system and computer program for comparing floating point numbers Oct 22, 2000 Issued
Array ( [id] => 1184336 [patent_doc_number] => 06748408 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-06-08 [patent_title] => 'Programmable non-integer fractional divider' [patent_app_type] => B1 [patent_app_number] => 09/693057 [patent_app_country] => US [patent_app_date] => 2000-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3172 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/748/06748408.pdf [firstpage_image] =>[orig_patent_app_number] => 09693057 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/693057
Programmable non-integer fractional divider Oct 19, 2000 Issued
Array ( [id] => 1017091 [patent_doc_number] => 06895421 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-05-17 [patent_title] => 'Method and apparatus for effectively performing linear transformations' [patent_app_type] => utility [patent_app_number] => 09/680665 [patent_app_country] => US [patent_app_date] => 2000-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 28484 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/895/06895421.pdf [firstpage_image] =>[orig_patent_app_number] => 09680665 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/680665
Method and apparatus for effectively performing linear transformations Oct 5, 2000 Issued
Array ( [id] => 7633174 [patent_doc_number] => 06658446 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-02 [patent_title] => 'Fast chainable carry look-ahead adder' [patent_app_type] => B1 [patent_app_number] => 09/647537 [patent_app_country] => US [patent_app_date] => 2000-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 4210 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/658/06658446.pdf [firstpage_image] =>[orig_patent_app_number] => 09647537 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/647537
Fast chainable carry look-ahead adder Oct 1, 2000 Issued
Array ( [id] => 497575 [patent_doc_number] => 07216140 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-05-08 [patent_title] => 'Efficient implementation of n-point DCT, n-point IDCT, SA-DCT and SA-IDCT algorithms' [patent_app_type] => utility [patent_app_number] => 09/676556 [patent_app_country] => US [patent_app_date] => 2000-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 4972 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/216/07216140.pdf [firstpage_image] =>[orig_patent_app_number] => 09676556 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/676556
Efficient implementation of n-point DCT, n-point IDCT, SA-DCT and SA-IDCT algorithms Sep 29, 2000 Issued
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