
William A. Luther
Examiner (ID: 14002)
| Most Active Art Unit | 2731 |
| Art Unit(s) | 2616, 2667, 2614, 2607, 2731, 2664 |
| Total Applications | 411 |
| Issued Applications | 321 |
| Pending Applications | 46 |
| Abandoned Applications | 44 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1160822
[patent_doc_number] => 06775684
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[patent_kind] => B1
[patent_issue_date] => 2004-08-10
[patent_title] => 'Digital matched filter'
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[patent_app_number] => 09/586596
[patent_app_country] => US
[patent_app_date] => 2000-06-02
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Array
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[patent_issue_date] => 2003-11-25
[patent_title] => 'Method and apparatus for computing parallel leading zero count with offset'
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Array
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[patent_issue_date] => 2003-09-23
[patent_title] => 'Divider and method with high radix'
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[patent_app_date] => 2000-06-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/585894 | Divider and method with high radix | May 31, 2000 | Issued |
Array
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[patent_issue_date] => 2004-08-03
[patent_title] => 'Parallel greater than analysis method and apparatus'
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Array
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[patent_title] => 'Fractional, arithmetic unit, fractional arithmetic method, set-up engine for handling graphic images and computer-readable medium'
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Array
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[patent_title] => 'Self-timed transmission system and method for processing multiple data sets'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/583206 | Self-timed transmission system and method for processing multiple data sets | May 29, 2000 | Issued |
Array
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[patent_title] => 'Floating-point processor with operating mode having improved accuracy and high performance'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/577238 | Floating-point processor with operating mode having improved accuracy and high performance | May 22, 2000 | Issued |
Array
(
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[patent_issue_date] => 2006-09-12
[patent_title] => 'Finite impulse response filter algorithm for implementation on digital signal processor having dual execution units'
[patent_app_type] => utility
[patent_app_number] => 09/570847
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/570847 | Finite impulse response filter algorithm for implementation on digital signal processor having dual execution units | May 11, 2000 | Issued |
Array
(
[id] => 321008
[patent_doc_number] => 07523151
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[patent_issue_date] => 2009-04-21
[patent_title] => 'Method and apparatus for performing computations using residue arithmetic'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/569944 | Method and apparatus for performing computations using residue arithmetic | May 11, 2000 | Issued |
Array
(
[id] => 146221
[patent_doc_number] => 07689637
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[patent_kind] => B1
[patent_issue_date] => 2010-03-30
[patent_title] => 'Adaptive filtering method and related device'
[patent_app_type] => utility
[patent_app_number] => 09/564427
[patent_app_country] => US
[patent_app_date] => 2000-05-04
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/564427 | Adaptive filtering method and related device | May 3, 2000 | Issued |
| 09/562906 | Multiplier for the fraction multiplicators | May 1, 2000 | Abandoned |
Array
(
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[patent_title] => 'Floating point pipeline method and circuit for fast inverse square root calculations'
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Array
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Array
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Array
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Array
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Array
(
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[patent_title] => 'DSP unit for multi-level global accumulation'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/541148 | DSP unit for multi-level global accumulation | Mar 30, 2000 | Issued |
| 09/539922 | Multipler architecture in a general purpose processor optimized for efficient multi-input addition | Mar 30, 2000 | Abandoned |
Array
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